TI TPS51116PWP

TPS51116 provides a complete power supply solution for DDR/SSTL-2, DDR2/SSTL-18, DDR3/SSTL-15, DDR3L, LPDDR3, and DDR4 memory systems. It integrates a synchronous buck controller with a 3A source/sink tracking LDO and a buffered low-noise reference. The device delivers the lowest total solution cost in space-constrained systems. The synchronous controller operates at a fixed 400kHz pseudo-constant-frequency PWM with adaptive on-time control, configurable in D-CAP™ mode for ease of use and fastest transient response, or in current mode to support ceramic output capacitors. The 3A source/sink LDO maintains fast transient response with only 20μF (2×10μF) ceramic output capacitors. In addition, the LDO power input is externally accessible, significantly reducing overall power dissipation. The device supports all sleep-state controls, placing VTT in a high-Z state during S3 (suspend-to-RAM) and discharging VDDQ, VTT, and VTTREF (soft shutdown) during S4/S5 (suspend-to-disk). The device also features comprehensive protection, including thermal shutdown, and is available in a 20-pin HTSSOP PowerPAD™ package and a 24-pin 4×4 QFN package.

• Synchronous buck controller (VDDQ)
• Wide input voltage range: 3.0V to 28V
• D−CAP™ mode with 100ns load transient response
• Current mode option supporting ceramic output capacitors
• Soft shutdown in S4/S5 states
• Current sensing via RDS(on) or resistor
• 2.5V (DDR), 1.8V (DDR2), adjustable to 1.5V (DDR3), 1.35V (DDR3L), 1.2V (LPDDR3 and DDR4), or output range 0.75V to 3.0V
• Power good, OVP, and UVP
• 3A LDO (VTT) with buffered reference (VREF)
• Source and sink capability up to 3A
• LDO input for optimized power dissipation
• Only 20μF ceramic output capacitor required
• Buffered low-noise 10mA VREF output
• ±20mV accuracy for VREF and VTT
• High-Z support in S3, soft shutdown in S4/S5
• Thermal shutdown

• DDR/DDR2/DDR3/DDR3L/LPDDR3/DDR4 memory power supply
• SSTL-2, SSTL-18, SSTL-15, and HSTL termination