Infineon SAK-XC2365B-40F80LR AB
| Manufacturer | |
| MPN | SAK-XC2365B-40F80LR AB |
| LCSC Part # | C538933 |
| Packaging | LQFP-100(14x14) |
| Customer # | |
| Key Attributes | LQFP-100(14x14) Microcontrollers RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | Infineon | |
| Packaging | LQFP-100(14x14) |
Report an ErrorShow similar products (0) >
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
AI Translation
16/32-Bit Single-Chip Microcontroller with 32-Bit Performance XC236xB (XC2000 Family)
Features
AI Translation
- High-performance CPU with five-stage pipeline and MPU
- 12.5 ns instruction cycle @ 80 MHz CPU clock (single-cycle execution)
- One-cycle 32-bit addition and subtraction with 40-bit result
- One-cycle multiplication (16×16 bit)
- Background division (32 / 16 bit) in 21 cycles
- One-cycle multiply-and-accumulate (MAC) instructions
- Enhanced Boolean bit manipulation facilities
- Zero-cycle jump execution
- Additional instructions to support HLL and operating systems
- Register-based design with multiple variable register banks
- Fast context switching support with two additional local register banks
- 16 Mbytes total linear address space for code and data
- 1,024 Bytes on-chip special function register area (C166 Family compatible)
- Integrated Memory Protection Unit (MPU)
- Interrupt system with 16 priority levels providing 96 interrupt nodes
- Selectable external inputs for interrupt generation and wake-up
- Fastest sample-rate 12.5 ns
- Eight-channel interrupt-driven single-cycle data transfer with Peripheral Event Controller (PEC), 24-bit pointers cover total address space
- Clock generation from internal or external clock sources, using on-chip PLL or prescaler
- Hardware CRC-Checker with Programmable Polynomial to Supervise On-Chip Memory Areas
- On-chip memory modules
- 8 Kbytes on-chip stand-by RAM (SBRAM)
- 2 Kbytes on-chip dual-port RAM (DPRAM)
- Up to 16 Kbytes on-chip data SRAM (DSRAM)
- Up to 16 Kbytes on-chip program/data SRAM (PSRAM)
- Up to 320 Kbytes on-chip program memory (Flash memory)
- Memory content protection through Error Correction Code (ECC)
- On-Chip Peripheral Modules – Two synchronizable A/D Converters with up to 16 channels, 10-bit resoluti
Not available now
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | Infineon | |
| Packaging | LQFP-100(14x14) |
Report an ErrorShow similar products (0) >
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
AI Translation
16/32-Bit Single-Chip Microcontroller with 32-Bit Performance XC236xB (XC2000 Family)
Features
AI Translation
- High-performance CPU with five-stage pipeline and MPU
- 12.5 ns instruction cycle @ 80 MHz CPU clock (single-cycle execution)
- One-cycle 32-bit addition and subtraction with 40-bit result
- One-cycle multiplication (16×16 bit)
- Background division (32 / 16 bit) in 21 cycles
- One-cycle multiply-and-accumulate (MAC) instructions
- Enhanced Boolean bit manipulation facilities
- Zero-cycle jump execution
- Additional instructions to support HLL and operating systems
- Register-based design with multiple variable register banks
- Fast context switching support with two additional local register banks
- 16 Mbytes total linear address space for code and data
- 1,024 Bytes on-chip special function register area (C166 Family compatible)
- Integrated Memory Protection Unit (MPU)
- Interrupt system with 16 priority levels providing 96 interrupt nodes
- Selectable external inputs for interrupt generation and wake-up
- Fastest sample-rate 12.5 ns
- Eight-channel interrupt-driven single-cycle data transfer with Peripheral Event Controller (PEC), 24-bit pointers cover total address space
- Clock generation from internal or external clock sources, using on-chip PLL or prescaler
- Hardware CRC-Checker with Programmable Polynomial to Supervise On-Chip Memory Areas
- On-chip memory modules
- 8 Kbytes on-chip stand-by RAM (SBRAM)
- 2 Kbytes on-chip dual-port RAM (DPRAM)
- Up to 16 Kbytes on-chip data SRAM (DSRAM)
- Up to 16 Kbytes on-chip program/data SRAM (PSRAM)
- Up to 320 Kbytes on-chip program memory (Flash memory)
- Memory content protection through Error Correction Code (ECC)
- On-Chip Peripheral Modules – Two synchronizable A/D Converters with up to 16 channels, 10-bit resoluti
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |

