TI LP2998MAX
| Manufacturer | |
| MPN | LP2998MAX |
| LCSC Part # | C5359813 |
| Packaging | SOIC-8 |
| Customer # | |
| Key Attributes | SOIC-8 Power Management - Specialized RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Power Management (PMIC)/Power Management - Specialized | |
| Manufacturer | TI | |
| Packaging | SOIC-8 | |
| Operating Temperature | -40℃~+125℃ | |
| Features | Output voltage tracking;Cable compensation | |
| Voltage - Supply | 2.2V~5.5V |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The LP2998 linear regulator is designed to meet JEDEC SSTL-2 and JEDEC SSTL-18 specifications for DDR-SDRAM and DDR2 memory termination. The device also supports DDR3 and DDR3L VTT bus termination with a minimum VDDQ of 1.35V. The device incorporates a high-speed op-amp that provides excellent response to load transients. The output stage prevents shoot-through while delivering 1.5A continuous current and up to 3A peak transient current in DDR-SDRAM termination applications. The LP2998 also integrates a VSENSE pin for superior load regulation and provides a VREF output as a reference for chipsets and DIMMs. Another feature of the LP2998 is an active-low shutdown (SD) pin that provides Suspend-to-RAM (STR) functionality. When the SD pin is pulled low, the VTT output enters a tri-state condition providing a high-impedance output, while VREF remains active. In this mode, power savings are achieved by reducing quiescent current.
Features
- Compliant with AEC-Q100 test guidelines (SO PowerPAD-8 package), device HBM ESD classification level H1C
- Junction temperature range: -40°C to 125°C
- Minimum VDDQ: 1.35V
- Source and sink current capability
- Low output voltage offset
- No external resistors required
- Linear topology
- Suspend-to-RAM (STR) function
- Minimal external components
- Thermal shutdown protection
Applications
- DDR1, DDR2, DDR3, and DDR3L termination voltage
- Automotive infotainment systems
- FPGA
- Industrial/medical PC
- SSTL-18, SSTL-2, and SSTL-3 termination
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 1.5797$ 1.1058 | $ 1.11 |
| 10+ | $ 1.4473$ 1.0132 | $ 10.13 |
| 30+ | $ 1.3643$ 0.9551 | $ 28.65 |
| 100+ | $ 1.2797$ 0.8958 | $ 89.58 |
| 500+ | $ 1.2414$ 0.8690 | $ 434.50 |
| 1,000+ | $ 1.2239$ 0.8568 | $ 856.80 |
Standard Packaging2500/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Power Management (PMIC)/Power Management - Specialized | |
| Manufacturer | TI | |
| Packaging | SOIC-8 | |
| Operating Temperature | -40℃~+125℃ | |
| Features | Output voltage tracking;Cable compensation | |
| Voltage - Supply | 2.2V~5.5V |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The LP2998 linear regulator is designed to meet JEDEC SSTL-2 and JEDEC SSTL-18 specifications for DDR-SDRAM and DDR2 memory termination. The device also supports DDR3 and DDR3L VTT bus termination with a minimum VDDQ of 1.35V. The device incorporates a high-speed op-amp that provides excellent response to load transients. The output stage prevents shoot-through while delivering 1.5A continuous current and up to 3A peak transient current in DDR-SDRAM termination applications. The LP2998 also integrates a VSENSE pin for superior load regulation and provides a VREF output as a reference for chipsets and DIMMs. Another feature of the LP2998 is an active-low shutdown (SD) pin that provides Suspend-to-RAM (STR) functionality. When the SD pin is pulled low, the VTT output enters a tri-state condition providing a high-impedance output, while VREF remains active. In this mode, power savings are achieved by reducing quiescent current.
Features
- Compliant with AEC-Q100 test guidelines (SO PowerPAD-8 package), device HBM ESD classification level H1C
- Junction temperature range: -40°C to 125°C
- Minimum VDDQ: 1.35V
- Source and sink current capability
- Low output voltage offset
- No external resistors required
- Linear topology
- Suspend-to-RAM (STR) function
- Minimal external components
- Thermal shutdown protection
Applications
- DDR1, DDR2, DDR3, and DDR3L termination voltage
- Automotive infotainment systems
- FPGA
- Industrial/medical PC
- SSTL-18, SSTL-2, and SSTL-3 termination
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



