Etron Tech EM638325TS-6G

The EM638325 SDRAM is a high-speed CMOS synchronous dynamic random access memory with a capacity of 64 Mbits. It is internally configured as four 512K x 32 DRAMs with a synchronous interface (all signals are registered on the rising edge of the clock signal CLK). Each 512K x 32-bit memory bank is organized as 2048 rows, 256 columns, and 32 bits. Read and write accesses to the SDRAM are burst-oriented; access begins at a selected location and continues for a programmed number of locations in a programmed sequence. Access begins with the registration of a BankActivate command, followed by a Read or Write command.

The EM638325 supports programmable read or write burst lengths of 1, 2, 4, 8, or full page, with a burst terminate option. Auto Precharge can be enabled to initiate a self-timed row precharge at the end of the burst sequence. Refresh operations (Auto Refresh or Self Refresh) are easy to use. Through a programmable mode register, the system can select the most suitable mode to maximize performance. These devices are ideal for applications requiring high memory bandwidth.

• Fast access time: 5/5.4/5.4 ns
• Fast clock frequency: 200/166/143 MHz
• Fully synchronous operation
• Internal pipelined architecture
• Four internal banks (512K x 32-bit x 4 banks)
• Programmable mode - CAS latency: 2 or 3
• Burst length: 1, 2, 4, 8, or full page
• Burst type: sequential or interleaved
• Burst read - single write
• Burst stop function
• Individual byte control via DQM0-3
• Auto refresh and self-refresh
• Ambient temperature: 0~70 °C
• 4096 refresh cycles / 64ms
• Single +3.3V ± 0.3V supply
• Interface: LVTTL
• 86-pin 400 x 875 mil plastic TSOP II package - lead-free and halogen-free
• 90-ball 8 x 13 x 1.2mm FBGA package - lead-free and halogen-free