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JSMSEMI SN74HC74DR-JSM
| Manufacturer | JSMSEMIAsian Brands |
| MPN | SN74HC74DR-JSM |
| LCSC Part # | C53436300 |
| Packaging | SOP-14 |
| Customer # | |
| Key Attributes | SOP-14 Flip Flops RoHS |
| Datasheet |  JSMSEMI SN74HC74DR-JSM |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | JSMSEMI | |
| Packaging | SOP-14 |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74HC/HCT74 are dual positive-edge-triggered D-type flip-flops. They feature individual data (nD), clock (nCP), set (nSD), and reset (nRD) inputs, along with complementary nQ and nQ outputs. Data at the nD input that meets the setup and hold time requirements relative to the low-to-high clock transition is stored in the flip-flop and appears at the nQ output. Input clamping diodes are provided, enabling the use of current-limiting resistors to interface inputs to voltages exceeding ΔVCC.
Features
- Input levels: CMOS for 74HC74D, TTL for 74HCT74D
- Symmetric output impedance
- Low power consumption
- Balanced propagation delay
- Operating temperature range: -40°C ~ +125°C
- Package types: DIP14/SOP14/TSSOP14
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.0965 | $ 0.48 |
| 50+ | $ 0.0761 | $ 3.81 |
| 150+ | $ 0.066 | $ 9.90 |
| 500+ | $ 0.0584 | $ 29.20 |
| 2,500+ | $ 0.0523 | $ 130.75 |
| 5,000+ | $ 0.0492 | $ 246.00 |
Standard Packaging2500/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | JSMSEMI | |
| Packaging | SOP-14 |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74HC/HCT74 are dual positive-edge-triggered D-type flip-flops. They feature individual data (nD), clock (nCP), set (nSD), and reset (nRD) inputs, along with complementary nQ and nQ outputs. Data at the nD input that meets the setup and hold time requirements relative to the low-to-high clock transition is stored in the flip-flop and appears at the nQ output. Input clamping diodes are provided, enabling the use of current-limiting resistors to interface inputs to voltages exceeding ΔVCC.
Features
- Input levels: CMOS for 74HC74D, TTL for 74HCT74D
- Symmetric output impedance
- Low power consumption
- Balanced propagation delay
- Operating temperature range: -40°C ~ +125°C
- Package types: DIP14/SOP14/TSSOP14
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |