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JSMSEMI 74LVC1G74DP-JSM
| Manufacturer | JSMSEMIAsian Brands |
| MPN | 74LVC1G74DP-JSM |
| LCSC Part # | C53436275 |
| Packaging | TSSOP-8 |
| Customer # | |
| Key Attributes | TSSOP-8 Flip Flops RoHS |
| Datasheet |  JSMSEMI 74LVC1G74DP-JSM |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | JSMSEMI | |
| Packaging | TSSOP-8 |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC1G74 is a single positive-edge-triggered D-type flip-flop with separate data (D) input, clock (CP) input, set (SD) and reset (RD) inputs, and complementary Q and Q̄ outputs. Set and reset are asynchronous active-LOW inputs that operate independently of the clock input. Data present at the D input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. For predictable operation, the D input must be stable for one setup time prior to the LOW-to-HIGH clock transition.
Features
- Wide supply voltage range: 1.65V ~ 5.5V
- 5V-tolerant outputs, compatible with 5V logic interface
- ±24mA output drive (Vcc = 3.0V)
- CMOS low power consumption
- Inputs withstand up to 5V
- Operating temperature range: -40℃ ~ +125℃
- Package options: TSSOP8/VSSOP8/SOP8/XSON8 (1×1.35×0.32)-0.35/XSON8 (1×1.95×0.5)-0.5
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.2876 | $ 1.44 |
| 50+ | $ 0.2275 | $ 11.38 |
| 150+ | $ 0.2017 | $ 30.26 |
| 500+ | $ 0.1696 | $ 84.80 |
| 3,000+ | $ 0.1553 | $ 465.90 |
| 6,000+ | $ 0.1467 | $ 880.20 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | JSMSEMI | |
| Packaging | TSSOP-8 |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC1G74 is a single positive-edge-triggered D-type flip-flop with separate data (D) input, clock (CP) input, set (SD) and reset (RD) inputs, and complementary Q and Q̄ outputs. Set and reset are asynchronous active-LOW inputs that operate independently of the clock input. Data present at the D input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. For predictable operation, the D input must be stable for one setup time prior to the LOW-to-HIGH clock transition.
Features
- Wide supply voltage range: 1.65V ~ 5.5V
- 5V-tolerant outputs, compatible with 5V logic interface
- ±24mA output drive (Vcc = 3.0V)
- CMOS low power consumption
- Inputs withstand up to 5V
- Operating temperature range: -40℃ ~ +125℃
- Package options: TSSOP8/VSSOP8/SOP8/XSON8 (1×1.35×0.32)-0.35/XSON8 (1×1.95×0.5)-0.5
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |