AP Memory APS6404L-3SQR-SN

This Pseudo-SRAM device features a high speed, low pin count interface. It has 4 SDR I/O pins and operates in SPI(serial peripheral interface) or QPI (quad peripheral interface) mode with frequencies up to 133 MHz. The data input (A/DQ) to the memory relies on clock (CLK) to latch all instructions, addresses and data. It is most suitable for low-power and low cost portable applications. It incorporates a seamless self-managed refresh mechanism. Hence it does not require the support of DRAM refresh from system host. The self-refresh feature is a special design to maximize performance of memory read operation.

• Single Supply Voltage: VDD = 2.7 to 3.6V
• Interface: SPI/QPI with SDR mode
• Performance:
  • Clock rate up to:
    • 133MHz for 32 Bytes Wrapped Burst operation at VDD = 3.0V +/- 10%
    • 109MHz for 32 Bytes Wrapped Burst operation at VDD = 3.3V +/- 10%
    • 84MHz for Linear Burst operation
• Organization: 64Mb, 8M x 8bits
• Addressable Bit Range: A[22:0]
• Page Size: 1024 bytes
• Refresh: Self-managed
• Operating Temperature Range:
  • TC = -40℃ to +85℃ (standard range)
  • TC = -40℃ to +105℃ (extended range)
• Maximum Standby Current:
  • 350μA @ 105℃
  • 250μA @ 85℃
  • 140μA @ 25℃
• 50Ω Output Drive Strength LVCMOS
• Linear Burst (continuous) or 32 Bytes Wrapped Burst via toggle command.
• Linear Burst is supported up to 84MHz and can cross page boundary as long as tCEM is met.
• Software reset