TOSHIBA 74VHCT573AFT(BE)
| Manufacturer | |
| MPN | 74VHCT573AFT(BE) |
| LCSC Part # | C5331519 |
| Packaging | TSSOP-20 |
| Customer # | |
| Key Attributes | Octal D-Type Latch with 3-State Outputs |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | TOSHIBA | |
| Packaging | TSSOP-20 | |
| Logic Type | D Latch | |
| Series | 74VHCT | |
| Quiescent Current | 4uA | |
| Voltage - Supply | 4.5V~5.5V | |
| Operating Temperature | -40℃~+125℃ | |
| Output Type | Tri-State | |
| Setup Time | 1.5ns | |
| Number of Channels | 8 | |
| Hold Time | 3.5ns | |
| Propagation Delay | 7.7ns |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74VHCT573A is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input (OE). When the OE input is high, the eight outputs are in a high impedance state. The input voltage are compatible with TTL output voltage. device may be used as a level converter for interfacing 3.3V to 5 V Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc.
Features
- AEC-Q100 (Rev. H)
- Wide operating temperature range: T_opr = -40 to 125 ℃
- High speed: Propagation delay time = 7.7 ns (typ.) at V_CC = 5.0 V
- Low power dissipation: I_CC = 4.0 μA (max) at T_a = 25 ℃
- Compatible with TTL inputs: V_IL = 0.8 V (max), V_IH = 2.0 V (min)
- Power down protection is provided on all inputs and outputs.
- Balanced propagation delays: t_pLH ≈ t_pHL
- Low noise: V_OLP = 1.5 V (max)
- Pin and function compatible with the 74 series (74ACT/HCT/AHCT etc.) 573 type.
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 0.3075 | $ 0.31 |
| 10+ | $ 0.3013 | $ 3.01 |
| 30+ | $ 0.2967 | $ 8.90 |
| 100+ | $ 0.2921 | $ 29.21 |
Standard Packaging2500/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | TOSHIBA | |
| Packaging | TSSOP-20 | |
| Logic Type | D Latch | |
| Series | 74VHCT | |
| Quiescent Current | 4uA | |
| Voltage - Supply | 4.5V~5.5V | |
| Operating Temperature | -40℃~+125℃ | |
| Output Type | Tri-State | |
| Setup Time | 1.5ns | |
| Number of Channels | 8 | |
| Hold Time | 3.5ns | |
| Propagation Delay | 7.7ns |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74VHCT573A is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input (OE). When the OE input is high, the eight outputs are in a high impedance state. The input voltage are compatible with TTL output voltage. device may be used as a level converter for interfacing 3.3V to 5 V Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc.
Features
- AEC-Q100 (Rev. H)
- Wide operating temperature range: T_opr = -40 to 125 ℃
- High speed: Propagation delay time = 7.7 ns (typ.) at V_CC = 5.0 V
- Low power dissipation: I_CC = 4.0 μA (max) at T_a = 25 ℃
- Compatible with TTL inputs: V_IL = 0.8 V (max), V_IH = 2.0 V (min)
- Power down protection is provided on all inputs and outputs.
- Balanced propagation delays: t_pLH ≈ t_pHL
- Low noise: V_OLP = 1.5 V (max)
- Pin and function compatible with the 74 series (74ACT/HCT/AHCT etc.) 573 type.
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



