DDF CD4094-SOP-16
| Manufacturer | DDFAsian Brands |
| MPN | CD4094-SOP-16 |
| LCSC Part # | C53199162 |
| Packaging | SOP-16 |
| Customer # | |
| Key Attributes | 3V~15V 135ns@15V,50pF Serial-to-Parallel SOP-16 Shift Registers RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Shift Registers | |
| Manufacturer | DDF | |
| Packaging | SOP-16 | |
| Operating temperature | -20℃~+85℃ | |
| Pd - Power Dissipation | - | |
| Voltage - Supply | 3V~15V | |
| Output Type | Tri-State | |
| Series | - | |
| Number of Elements | - | |
| Output Current | - | |
| Features | Output enable | |
| Propagation Delay | 135ns@15V,50pF | |
| Function | Serial-to-Parallel |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The CD4094 is an 8-bit serial shift register with a storage latch for each bit, used to strobe serial input data to a parallel buffer with three-state outputs that can be connected directly to a common bus. Data is shifted on the rising edge of the input clock; when the STROBE signal is high, data in the shift register is transferred to the storage register; simultaneously, when the OUTPUT-ENABLE signal is high, data in the storage register appears at the outputs. The device provides two serial outputs (QS and Q'S) for cascading multiple CD4094 devices. In cascaded systems with fast clock rising edges, data can be captured from the QS serial output on the clock rising edge for high-speed operation. In cascaded systems with slow clock rising edges, the same serial information can be captured from Q'S on the next clock falling edge. QS begins outputting on the rising edge of the 9th serial clock, while Q'S begins outputting on the falling edge of the 9th serial clock. The device is available in SOP16 and DIP16 packages.
Features
- Operating voltage range: 3~15V
- TTL-compatible
- Symmetrical output characteristics
- Input/output ESD protection
- Three-state output
Applications
- Serial-to-parallel data conversion
- Remote-controlled storage registers
- Dual-stage shift, hold, and bus applications
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.0886 | $ 0.44 |
| 50+ | $ 0.0697 | $ 3.49 |
| 150+ | $ 0.0603 | $ 9.05 |
| 500+ | $ 0.0532 | $ 26.60 |
| 2,500+ | $ 0.0475 | $ 118.75 |
| 5,000+ | $ 0.0446 | $ 223.00 |
Standard Packaging2500/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Shift Registers | |
| Manufacturer | DDF | |
| Packaging | SOP-16 | |
| Operating temperature | -20℃~+85℃ | |
| Pd - Power Dissipation | - | |
| Voltage - Supply | 3V~15V | |
| Output Type | Tri-State | |
| Series | - | |
| Number of Elements | - | |
| Output Current | - | |
| Features | Output enable | |
| Propagation Delay | 135ns@15V,50pF | |
| Function | Serial-to-Parallel |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The CD4094 is an 8-bit serial shift register with a storage latch for each bit, used to strobe serial input data to a parallel buffer with three-state outputs that can be connected directly to a common bus. Data is shifted on the rising edge of the input clock; when the STROBE signal is high, data in the shift register is transferred to the storage register; simultaneously, when the OUTPUT-ENABLE signal is high, data in the storage register appears at the outputs. The device provides two serial outputs (QS and Q'S) for cascading multiple CD4094 devices. In cascaded systems with fast clock rising edges, data can be captured from the QS serial output on the clock rising edge for high-speed operation. In cascaded systems with slow clock rising edges, the same serial information can be captured from Q'S on the next clock falling edge. QS begins outputting on the rising edge of the 9th serial clock, while Q'S begins outputting on the falling edge of the 9th serial clock. The device is available in SOP16 and DIP16 packages.
Features
- Operating voltage range: 3~15V
- TTL-compatible
- Symmetrical output characteristics
- Input/output ESD protection
- Three-state output
Applications
- Serial-to-parallel data conversion
- Remote-controlled storage registers
- Dual-stage shift, hold, and bus applications
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



