JSMSEMI 74HC573D-JSM
| Manufacturer | JSMSEMIAsian Brands |
| MPN | 74HC573D-JSM |
| LCSC Part # | C53114437 |
| Packaging | SOP-20 |
| Customer # | |
| Key Attributes | SOP-20 Latches RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | JSMSEMI | |
| Packaging | SOP-20 |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 2000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74HC/HCT573 is an 8-bit D-type latch with three-state outputs. The device features a Latch Enable (LE) pin and an Output Enable (OE) pin. When LE is HIGH, input data is passed to the latches, and the device operates in transparent mode — the outputs change in response to their corresponding D inputs. When LE is LOW, the latches store the input information that was present one setup time before the falling edge of LE. A HIGH on OE forces all outputs into a high-impedance state. OE operation does not affect the internal state of the latches. Input clamping diodes are provided, allowing the input interfaces to be connected to voltages higher than VCC through current-limiting resistors.
Features
- Input levels: CMOS for 74HC573; TTL for 74HCT573
- Input and output pins on opposite sides of the package for easy microprocessor interfacing
- Suitable as I/O ports for microprocessors and microcomputer systems
- Three-state non-inverting outputs for bus applications
- Common three-state output enable input
- Operating temperature range: -40℃ ~ +125℃
- Package types: DIP20, SOP20, TSSOP20
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.176 | $ 0.88 |
| 50+ | $ 0.1392 | $ 6.96 |
| 150+ | $ 0.1235 | $ 18.53 |
| 500+ | $ 0.1038 | $ 51.90 |
| 2,000+ | $ 0.095 | $ 190.00 |
| 4,000+ | $ 0.0898 | $ 359.20 |
Standard Packaging2000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | JSMSEMI | |
| Packaging | SOP-20 |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 2000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74HC/HCT573 is an 8-bit D-type latch with three-state outputs. The device features a Latch Enable (LE) pin and an Output Enable (OE) pin. When LE is HIGH, input data is passed to the latches, and the device operates in transparent mode — the outputs change in response to their corresponding D inputs. When LE is LOW, the latches store the input information that was present one setup time before the falling edge of LE. A HIGH on OE forces all outputs into a high-impedance state. OE operation does not affect the internal state of the latches. Input clamping diodes are provided, allowing the input interfaces to be connected to voltages higher than VCC through current-limiting resistors.
Features
- Input levels: CMOS for 74HC573; TTL for 74HCT573
- Input and output pins on opposite sides of the package for easy microprocessor interfacing
- Suitable as I/O ports for microprocessors and microcomputer systems
- Three-state non-inverting outputs for bus applications
- Common three-state output enable input
- Operating temperature range: -40℃ ~ +125℃
- Package types: DIP20, SOP20, TSSOP20
C53114437 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



