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EDA ModelsEasyEDA
micron MT25QL128ABA1ESE-0SIT
| Manufacturer | |
| MPN | MT25QL128ABA1ESE-0SIT |
| LCSC Part # | C524856 |
| Packaging | SOP-8-208mil |
| Customer # | |
| Key Attributes | 128Mb, 3V Multiple I/O Serial Flash Memory |
| Datasheet |  micron MT25QL128ABA1ESE-0SIT |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | micron | |
| Packaging | SOP-8-208mil | |
| Voltage - Supply | 2.7V~3.6V | |
| Memory Size | 128Mbit | |
| Operating temperature | -40℃~+85℃ | |
| Program / Erase Cycles | 100,000 cycles | |
| Clock Frequency | 133MHz | |
| Features | Write enable latch;Power-on reset;Hardware write protection;Software write protection;Absolute write protection | |
| Data Retention - TDR (Year) | 20 Years | |
| Block Erase Time(tBE) | - | |
| Page Programming Time (Tpp) | 120us | |
| Interface | SPI |
Report an ErrorShow similar products (0) >
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 300 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Features
AI Translation
- SPI-compatible serial bus interface
- Single and double transfer rate (STR/DTR)
- Clock frequency – 133 MHz (MAX) for all protocols in STR – 90 MHz (MAX) for all protocols in DTR
- Dual/quad I/O commands for increased throughput up to 90 MB/s
- Supported protocols in both STR and DTR Extended I/O protocol – Dual I/O protocol – Quad I/O protocol
- Execute-in-place (XIP)
- PROGRAM/ERASE SUSPEND operations
- Volatile and nonvolatile configuration settings
- Software reset
- Additional reset pin for selected part numbers
- Dedicated 64-byte OTP area outside main memory – Readable and user-lockable – Permanent lock with PROGRAM OTP command
- Erase capability – Bulk erase – Sector erase 64KB uniform granularity – Subsector erase 4KB, 32KB granularity
- Security and write protection – Volatile and nonvolatile locking and software write protection for each 64KB sector – Nonvolatile configuration locking – Password protection – Hardware write protection: nonvolatile bits (BP[3:0] and TB) define protected area size – Program/erase protection during power-up – CRC detects accidental changes to raw data
- Electronic signature – JEDEC-standard 3-byte signature (BA18h) – Extended device ID: two additional bytes identify device factory options
- JESD47H-compliant – Minimum 100,000 ERASE cycles per sector – Data retention: 20 years (TYP)
Not available now
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | micron | |
| Packaging | SOP-8-208mil | |
| Voltage - Supply | 2.7V~3.6V | |
| Memory Size | 128Mbit | |
| Operating temperature | -40℃~+85℃ | |
| Program / Erase Cycles | 100,000 cycles | |
| Clock Frequency | 133MHz | |
| Features | Write enable latch;Power-on reset;Hardware write protection;Software write protection;Absolute write protection | |
| Data Retention - TDR (Year) | 20 Years | |
| Block Erase Time(tBE) | - | |
| Page Programming Time (Tpp) | 120us | |
| Interface | SPI |
Report an ErrorShow similar products (0) >
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 300 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Features
AI Translation
- SPI-compatible serial bus interface
- Single and double transfer rate (STR/DTR)
- Clock frequency – 133 MHz (MAX) for all protocols in STR – 90 MHz (MAX) for all protocols in DTR
- Dual/quad I/O commands for increased throughput up to 90 MB/s
- Supported protocols in both STR and DTR Extended I/O protocol – Dual I/O protocol – Quad I/O protocol
- Execute-in-place (XIP)
- PROGRAM/ERASE SUSPEND operations
- Volatile and nonvolatile configuration settings
- Software reset
- Additional reset pin for selected part numbers
- Dedicated 64-byte OTP area outside main memory – Readable and user-lockable – Permanent lock with PROGRAM OTP command
- Erase capability – Bulk erase – Sector erase 64KB uniform granularity – Subsector erase 4KB, 32KB granularity
- Security and write protection – Volatile and nonvolatile locking and software write protection for each 64KB sector – Nonvolatile configuration locking – Password protection – Hardware write protection: nonvolatile bits (BP[3:0] and TB) define protected area size – Program/erase protection during power-up – CRC detects accidental changes to raw data
- Electronic signature – JEDEC-standard 3-byte signature (BA18h) – Extended device ID: two additional bytes identify device factory options
- JESD47H-compliant – Minimum 100,000 ERASE cycles per sector – Data retention: 20 years (TYP)
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | 3A991B1A |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | 3A991B1A |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |