TI SM320C6678ACYPW

The SM320C6678 DSP is a highest-performance fixed/floating-point DSP that is based on TI's KeyStone multicore architecture. Incorporating the new and innovative C66x DSP core, this device can run at a core speed of up to 1 GHz. For developers of a broad range of applications, such as mission critical, medical imaging, test and automation, and other applications requiring high performance, TI's SM320C6678 DSP offers 8 GHz cumulative DSP and enables a platform that is power-efficient and easy to use. In addition, it is fully backward compatible with all existing C6000 family fixed and floating point DSPs.

TI's KeyStone architecture provides a programmable platform integrating various subsystems (C66x cores, memory subsystem, peripherals, and accelerators) and uses several innovative components and techniques to maximize intra-device and inter-device communication that allows the various DSP resources to operate efficiently and seamlessly. Central to this architecture are key components such as Multicore Navigator that allows for efficient data management between the various device components. The TeraNet is a non-blocking switch fabric enabling fast and contention-free internal data movement. The multicore shared memory controller allows access to shared and external memory directly without drawing from switch fabric capacity.

• 1.0 GHz C66x Fixed/Floating-Point CPU Core
• 44.8 GMAC/Core for Fixed Point @ 1 GHz
• 22.4 GFLOP/Core for Floating Point @ 1 GHz
• 32K Byte L1P Per Core
• 32K Byte L1D Per Core
• 512K Byte Local L2 Per Core
• Multicore Shared Memory Controller (MSMC) – 4096KB MSM SRAM Memory Shared by Eight DSP C66x CorePacs
• Memory Protection Unit for Both MSM SRAM and DDR3_EMIF
• Multicore Navigator – 8192 Multipurpose Hardware Queues with Queue Manager
• Packet-Based DMA for Zero-Overhead Transfers
• Transport Plane IPsec, GTP-U, SCTP, PDCP L2 User Plane PDCP (RoHC, Air Ciphering) 1-Gbps Wire-Speed Throughput at 1.5 MPackets Per Second
• Security Accelerator Engine Enables Support for IPSec, SRTP, 3GPP, WiMAX Air Interface, and SSL/TLS Security ECB, CBC, CTR, F8, A5/3, CCM, GCM, HMAC, CMAC, GMAC, AES, DES, 3DES, Kasumi, SNOW 3G, SHA-1, SHA-2 (256-bit Hash), MD5
• Up to 2.8 Gbps Encryption Speed
• 24/2.5/3.125/5 GBaud Operation Supported Per Lane
• Supports Direct I/O, Message Passing
• Supports Four 1x, Two 2x, One 4x, and Two 1x + One 2x Link Configurations
• PCIe Gen2
• Single Port Supporting 1 or 2 Lanes
• Supports Up To 5 GBaud Per Lane
• Supports up to 3.125 GBaud Per Lane in Extended Temperature Range of -55℃ to 115℃
• HyperLink Supports Connections to Other KeyStone Architecture Devices Providing Resource Scalability
• Supports up to 25 Gbaud
• Two SGMII Ports Supports 10/100/1000 Mbps Operation
• 8G Byte Addressable Memory Space
• DDR3 functionally tested for extended temperature range of -55℃ to 115℃
• Some Noted Parameters Specified for -40℃ to 105℃ Only
• 16-Bit EMIF
• Two Telecom Serial Ports (TSIP)
• Supports 1024 DS0s Per TSIP
• Supports 2/4/8 Lanes at 32.768/16.384/8.192 Mbps Per Lane
• UART Interface
• I2C Interface
• 16 GPIO Pins
• SPI Interface
• Semaphore Module
• Sixteen 64-Bit Timers
• Three On-Chip PLLs
• Extended Temperature: -55℃ to 115℃

• Mission-Critical Systems
• High-Performance Computing Systems
• Communications
• Audio
• Video Infrastructure
• Imaging
• Analytics
• Networking
• Media Processing
• Industrial Automation
• Automation and Process Control