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MAXIM MAX9122EUE+TRoHS

Manufacturer
MPN
MAX9122EUE+T
LCSC Part #
C516786
Packaging
TSSOP-16
Customer #
Key Attributes
Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout
Datasheetpdf iconMAXIM MAX9122EUE+T
In-Stock: 188
188 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 2.2523$ 2.1172$ 2.12
10+$ 1.9164$ 1.8015$ 18.02
30+$ 1.7071$ 1.6047$ 48.14
100+$ 1.4913$ 1.4019$ 140.19
500+$ 1.3939$ 1.3103$ 655.15
1,000+$ 1.3517$ 1.2706$ 1270.60
Standard Packaging2500/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Interface/Drivers, Receivers, Transceivers
ManufacturerMAXIM
PackagingTSSOP-16
Voltage - Supply3V~3.6V
TypeReceiver
Data Rate500Mbps
Operating Temperature-40℃~+85℃
Number of Drivers0
FeaturesFail-safe;Input termination and bias integration
Level StandardLVDS;LVCMOS
Number of Receivers4

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

The MAX9121/MAX9122 quad low- voltage differential signaling (LVDS) differential line receivers are ideal for applications requiring high data rates, low power, and low noise. The MAX9121/MAX9122 are guaranteed to receive data at speeds up to 500Mbps (250MHz) over controlled impedance media of approximately 100. The transmission media may be printed circuit (PC) board traces or cables. The devices accept four LVDS differential inputs and translate them to LVCMOS outputs. The MAX9122 features integrated parallel termination resistors (nominally 107Ω), which eliminate the requirement for four discrete termination resistors and reduce stub lengths. The MAX9121 inputs are high impedance and require an external termination resistor when used in a point- to- point connection. The devices support a wide common- mode input range of 0.05V to 2.35V, allowing for ground potential differences and common- mode noise between the driver and the receiver. A fail- safe feature sets the output high when the inputs are open, or when the inputs are undriven and shorted or parallel terminated. The EN and EN(overline) inputs control the high- impedance output. The enables are common to all four receivers. Inputs conform to the ANSI TIA/EIA644 LVDS standard. Flow- through pinout simplifies PC board layout and reduces crosstalk by separating the LVDS inputs and LVCMOS outputs. The MAX9121/ MAX9122 operate from a single +3.3V supply, and are specified for operation from - 40℃ to +85℃. These devices are available in 16- pin TSSOP and SO packages. Refer to the MAX9123 data sheet for a quad LVDS line driver with flow- through pinout.

Features

AI Translation
  • Integrated Termination Eliminates Four External Resistors (MAX9122)
  • Flow- Through Pinout Simplifies PC Board Layout Reduces Crosstalk
  • Pin Compatible with DS90LV048A
  • Guaranteed 500Mbps Data Rate
  • 300ps Pulse Skew (max)
  • Conform to ANSI TIA/EIA- 644 LVDS Standard
  • Single +3.3V Supply
  • Fail- Safe Circuit

Applications

AI Translation
  • Digital Copiers
  • Laser Printers
  • Cellular Phone Base Stations
  • Add/Drop Muxes
  • Digital Cross- Connects
  • DSLAMs
  • Network Switches/Routers
  • Backplane Interconnect
  • Clock Distribution