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ADI HMC7044LP10BETR
| Manufacturer | |
| MPN | HMC7044LP10BETR |
| LCSC Part # | C514403 |
| Packaging | LFCSP-68(10x10) |
| Customer # | |
| Key Attributes | 3.2 GHz, 14-Output Jitter Attenuator with JESD204B |
| Datasheet |  ADI HMC7044LP10BETR |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | ADI | |
| Packaging | LFCSP-68(10x10) | |
| Operating Temperature | -40℃~+85℃ | |
| Clock/Oscillator | External | |
| Output Frequency(Max) | 3.2GHz | |
| Voltage - Supply | 3.135V~3.465V | |
| Period Jitter, Peak-to-Peak | -;- | |
| Phase Offset | Support | |
| Features | - | |
| Output Level | LVDS;LVPECL;CML | |
| Phase Jitter | 44fs | |
| Number of Outputs | 14 |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The HMC7044 is a high performance, dual-loop, integer-N jitter attenuator capable of performing reference selection and generation of ultralow phase noise frequencies for high speed data converters with either parallel or serial (JESD204B type) interfaces. The HMC7044 features two integer mode PLLs and overlapping on-chip VCOs that are SPI-selectable with wide tuning ranges around 2.5 GHz and 3 GHz, respectively. The device is designed to meet the requirements of GSM and LTE base station designs, and offers a wide range of clock management and distribution features to simplify baseband and radio card clock tree designs. The HMC7044 provides 14 low noise and configurable outputs to offer flexibility in interfacing with many different components including data converters, field-programmable gate arrays (FPGAs), and mixer local oscillators (LOs). The DCLK and SYSREF clock outputs of the HMC7044 can be configured to support signaling standards, such as CML, LVDS, LVPECL, and LVCMOS, and different bias settings to offset varying board insertion losses.
Features
- Noise floor: −156 dBc/Hz at 2457.6 MHz
- Low phase noise: −141.7 dBc/Hz at 800 kHz, 983.04 MHz output
- Up to 14 LVDS, LVPECL, or CML type device clocks (DCLKs) from PLL2 programmable on each of 14 clock output channels
- SPI-programmable phase noise vs. power consumption
- SYSREF valid interrupt to simplify JESD204B synchronization
- Narrow-band, dual core VCOs
- Up to 2 buffered voltage controlled oscillator (VCXO) outputs
- Up to 4 input clocks in LVDS, LVPECL, CMOS, and CML modes
- Frequency holdover mode to maintain output frequency
- Loss of signal (LOS) detection and hitless reference switching
- 4× GPIOs alarms/status indicators to determine the health of the system
- External VCO input to support up to 6000 MHz
- On-board regulators for excellent PSRR
- 68-lead, 10 mm×10 mm LFCSP package
Applications
- JESD204B clock generation
- Cellular infrastructure (multicarrier GSM, LTE, W-CDMA)
- Data converter clocking
- Microwave baseband cards
- Phase array reference distribution
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 44.7969$ 42.5571 | $ 42.56 |
| 5+ | $ 42.1067$ 40.0014 | $ 200.01 |
| 30+ | $ 40.0895$ 38.0851 | $ 1142.55 |
Standard Packaging500/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | ADI | |
| Packaging | LFCSP-68(10x10) | |
| Operating Temperature | -40℃~+85℃ | |
| Clock/Oscillator | External | |
| Output Frequency(Max) | 3.2GHz | |
| Voltage - Supply | 3.135V~3.465V | |
| Period Jitter, Peak-to-Peak | -;- | |
| Phase Offset | Support | |
| Features | - | |
| Output Level | LVDS;LVPECL;CML | |
| Phase Jitter | 44fs | |
| Number of Outputs | 14 |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The HMC7044 is a high performance, dual-loop, integer-N jitter attenuator capable of performing reference selection and generation of ultralow phase noise frequencies for high speed data converters with either parallel or serial (JESD204B type) interfaces. The HMC7044 features two integer mode PLLs and overlapping on-chip VCOs that are SPI-selectable with wide tuning ranges around 2.5 GHz and 3 GHz, respectively. The device is designed to meet the requirements of GSM and LTE base station designs, and offers a wide range of clock management and distribution features to simplify baseband and radio card clock tree designs. The HMC7044 provides 14 low noise and configurable outputs to offer flexibility in interfacing with many different components including data converters, field-programmable gate arrays (FPGAs), and mixer local oscillators (LOs). The DCLK and SYSREF clock outputs of the HMC7044 can be configured to support signaling standards, such as CML, LVDS, LVPECL, and LVCMOS, and different bias settings to offset varying board insertion losses.
Features
- Noise floor: −156 dBc/Hz at 2457.6 MHz
- Low phase noise: −141.7 dBc/Hz at 800 kHz, 983.04 MHz output
- Up to 14 LVDS, LVPECL, or CML type device clocks (DCLKs) from PLL2 programmable on each of 14 clock output channels
- SPI-programmable phase noise vs. power consumption
- SYSREF valid interrupt to simplify JESD204B synchronization
- Narrow-band, dual core VCOs
- Up to 2 buffered voltage controlled oscillator (VCXO) outputs
- Up to 4 input clocks in LVDS, LVPECL, CMOS, and CML modes
- Frequency holdover mode to maintain output frequency
- Loss of signal (LOS) detection and hitless reference switching
- 4× GPIOs alarms/status indicators to determine the health of the system
- External VCO input to support up to 6000 MHz
- On-board regulators for excellent PSRR
- 68-lead, 10 mm×10 mm LFCSP package
Applications
- JESD204B clock generation
- Cellular infrastructure (multicarrier GSM, LTE, W-CDMA)
- Data converter clocking
- Microwave baseband cards
- Phase array reference distribution
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |