- Pinout Diagram
- Footprint Diagram
FORESEE F35SQA001G-WWT
| Manufacturer | FORESEEAsian Brands |
| MPN | F35SQA001G-WWT |
| LCSC Part # | C5126827 |
| Packaging | WSON-8-EP(6x8) |
| Customer # | |
| Key Attributes | 1Gbit SPI NAND Flash |
| Datasheet |  FORESEE F35SQA001G-WWT |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | FORESEE | |
| Packaging | WSON-8-EP(6x8) | |
| Voltage - Supply | 2.7V~3.6V | |
| Memory Size | 1Gbit | |
| Operating temperature | -40℃~+85℃ | |
| Program / Erase Cycles | 100,000 cycles | |
| Clock Frequency | 104MHz | |
| Features | Read buffer function;Write enable latch;Software reset function;Hardware write protection function;Software write protection function;ECC error correction function;OTP region write protection and lock function | |
| Data Retention - TDR (Year) | 10 years | |
| Block Erase Time(tBE) | 2ms | |
| Write Cycle Time(tWC) | - | |
| Page Programming Time (Tpp) | 350us | |
| Standby Supply Current | 10uA | |
| Interface | SPI |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 480 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The F35SQA001G is a 1G-bit (128Mx8bit) Serial NAND Flash Memory, operates on a single 3.3V VCC. The device supports the standard Serial Peripheral Interface (SPI), Dual/Quad SPI: Serial Clock, Chip Select, Serial Data SIO0 (DI), SIO1 (DO), SIO2 (WP#) and SIO3 (HOLD#). SPI clock frequencies of up to 104 MHz are supported. The F35SQA001G supports JEDEC standard manufacturer and device ID, Unique ID, one parameter page and 62 OTP pages. An internal 1-bit ECC logic is available in the chip, which is enabled by default. The internal ECC can be disabled or enabled by command.
Features
- Voltage Supply - VCC: 2.7V ~ 3.6V
- Memory Cell Array: (128M + 4M) Byte - Page Size: (2k + 64) Byte - Block Size: 64 pages, (128k + 4k) Byte
- Standard SPI: CLK, CS#, DI, DO, WP#, HOLD# - Dual SPI: CLK, CS#, SIO0 - SIO1, WP#, HOLD# - Quad SPI: CLK, CS#, SIO0 - SIO3
- 104 MHz Standard/Dual/Quad SPI clocks - Page Program Time: 350µs (Typ.) - Block Erase Time: 2ms (Typ.)
- Standby: 10µA (Typ.) - Page Read: 10mA (Typ.) - Program/Erase: 15mA (Typ.)
- On chip 1 - Bit ECC for memory array - Software and Hardware write protect - Unique ID - One 2kB parameter page - Sixty-two 2kB OTP Pages
- Endurance: typical 100k cycles (1) - Data Retention: 10 years (1)
- Package - 8 - WSON (8x6mm)
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 7.9978 | $ 8.00 |
| 10+ | $ 6.9138 | $ 69.14 |
| 30+ | $ 6.2528 | $ 187.58 |
| 100+ | $ 5.428 | $ 542.80 |
Standard Packaging480/Full Tray | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | FORESEE | |
| Packaging | WSON-8-EP(6x8) | |
| Voltage - Supply | 2.7V~3.6V | |
| Memory Size | 1Gbit | |
| Operating temperature | -40℃~+85℃ | |
| Program / Erase Cycles | 100,000 cycles | |
| Clock Frequency | 104MHz | |
| Features | Read buffer function;Write enable latch;Software reset function;Hardware write protection function;Software write protection function;ECC error correction function;OTP region write protection and lock function | |
| Data Retention - TDR (Year) | 10 years | |
| Block Erase Time(tBE) | 2ms | |
| Write Cycle Time(tWC) | - | |
| Page Programming Time (Tpp) | 350us | |
| Standby Supply Current | 10uA | |
| Interface | SPI |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 480 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The F35SQA001G is a 1G-bit (128Mx8bit) Serial NAND Flash Memory, operates on a single 3.3V VCC. The device supports the standard Serial Peripheral Interface (SPI), Dual/Quad SPI: Serial Clock, Chip Select, Serial Data SIO0 (DI), SIO1 (DO), SIO2 (WP#) and SIO3 (HOLD#). SPI clock frequencies of up to 104 MHz are supported. The F35SQA001G supports JEDEC standard manufacturer and device ID, Unique ID, one parameter page and 62 OTP pages. An internal 1-bit ECC logic is available in the chip, which is enabled by default. The internal ECC can be disabled or enabled by command.
Features
- Voltage Supply - VCC: 2.7V ~ 3.6V
- Memory Cell Array: (128M + 4M) Byte - Page Size: (2k + 64) Byte - Block Size: 64 pages, (128k + 4k) Byte
- Standard SPI: CLK, CS#, DI, DO, WP#, HOLD# - Dual SPI: CLK, CS#, SIO0 - SIO1, WP#, HOLD# - Quad SPI: CLK, CS#, SIO0 - SIO3
- 104 MHz Standard/Dual/Quad SPI clocks - Page Program Time: 350µs (Typ.) - Block Erase Time: 2ms (Typ.)
- Standby: 10µA (Typ.) - Page Read: 10mA (Typ.) - Program/Erase: 15mA (Typ.)
- On chip 1 - Bit ECC for memory array - Software and Hardware write protect - Unique ID - One 2kB parameter page - Sixty-two 2kB OTP Pages
- Endurance: typical 100k cycles (1) - Data Retention: 10 years (1)
- Package - 8 - WSON (8x6mm)
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |