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ST STM32MP157AAC3 product image
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ST STM32MP157AAC3RoHS

Manufacturer
MPN
STM32MP157AAC3
LCSC Part #
C511448
Packaging
TFBGA-361(12x12)
Customer #
Key Attributes
Arm dual Cortex-A7 + Cortex-M4 MPU, 3D GPU, TFT/DSI, communication interfaces, timers, analog peripherals
Datasheetpdf iconST STM32MP157AAC3

Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Embedded/Microprocessors
ManufacturerST
PackagingTFBGA-361(12x12)
CPU CoreARM Cortex-ASeries
CPU Maximum Speed209MHz;650MHz

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging189
Sales UnitPiece

Features

AI Translation
  • Includes ST state-of-the-art patented technology
  • 32-bit dual-core Arm Cortex-A7 L1 32-Kbyte I / 32-Kbyte D for each core 256-Kbyte unified level 2 cache Arm NEON and Arm TrustZone 32-bit Arm Cortex-M4 with FPU/MPU Up to 209 MHz (Up to 703 CoreMark)
  • External DDR memory up to 1 Gbyte – up to LPDDR2/LPDDR3-1066 16/32-bit up to DDR3/DDR3L-1066 16/32-bit 708 Kbytes of internal SRAM: 256 Kbytes of AXI SYSRAM + 384 Kbytes of AHB SRAM + 64 Kbytes of AHB SRAM in Backup domain and 4 Kbytes of SRAM in Backup domain • Dual mode Quad-SPI memory interface Flexible external memory controller with up to 16-bit data bus: parallel interface to connect external ICs and SLC NAND memories with up to 8-bit ECC
  • TrustZone peripherals, active tamper Cortex-M4 resources isolation
  • 1.71 V to 3.6 V I/Os supply (5 V-tolerant I/Os) POR, PDR, PVD and BOR On-chip LDOs (RETRAM, BKPSRAM, DSI 1.2 V, USB 1.8 V, 1.1 V) • Backup regulator (∼0.9 V) Internal temperature sensors
  • Low-power modes: Sleep, Stop and Standby DDR memory retention in Standby mode Controls for PMIC companion chip
  • Total current consumption down to 2 μA (Standby mode, no RTC, no LSE, no BKPSRAM, no RETRAM)
  • Internal oscillators: 64 MHz HSI oscillator, 4 MHz CSI oscillator, 32 kHz LSI oscillator External oscillators: 8-48 MHz HSE oscillator, 32.768 kHz LSE oscillator 6x PLLs with fractional mode
  • Up to 176 I/O ports with interrupt capability Up to 8 secure I/Os Up to 6 Wakeup, 3 tampers, 1 active tamper
  • 2 bus matrices 64-bit Arm AMBA AXI interconnect, up to 266 MHz 32-bit Arm AMBA AHB interconnect, up to 209 MHz
  • 3 DMA controllers to unload the CPU 48 physical channels in total 1x high-speed general-purpose master direct memory access controller (MDMA) 2x dual-port DMAs with FIFO and request router capabilities for optimal peripheral management
  • Up to 37 communication peripherals 6x I²C FM+ (1 Mbit/s, SMBus/PMBus) • 4x UART + 4x USART (12.5 Mbit/s, ISO7816 interface, LIN, IrDA, SPI slave) 6x SPI (50 Mbit/s, including 3 with full duplex I²S audio class accuracy via internal audio PLL or external clock) 4x SA (stereo audio: I²S, PDM, SPDIF Tx) • SPDIF Rx with 4 inputs • HDMI-CEC interface • MDIO Slave interface • 3x SDMMC up to 8-bit (SD / eMMC / SDIO) 2x CAN controllers supporting CAN FD protocol, out of which one supports timetriggered CAN (TTCAN) 2x USB 2.0 high-speed Host + 1x USB 2.0 full-speed OTG simultaneously or 1x USB 2.0 high-speed Host + 1x USB 2.0 high-speed OTG simultaneously 10/100M or Gigabit Ethernet GMAC IEEE 1588v2 hardware, MII/RMII/GMII/RGMII 8- to 14-bit camera interface up to 140 Mbyte/s
  • 2x ADCs with 16-bit max. resolution (12 bits up to 4.5 Msps, 14 bits up to 4 Msps, 16 bits up to 3.6 Msps) 1x temperature sensor • 2x12-bit D/A converters (1 MHz) 1x digital filters for sigma delta modulator (DFSDM) with 8 channels/6 filters Internal or external ADC/DAC reference VREF+
  • 3D GPU: Vivante - OpenGL ES 2.0 – Up to 26 Mtriangle/s, 133 Mpixel/s LCD-TFT controller, up to 24-bit // RGB888 up to WXGA (1366x768) @60 fps or up to Full HD (1920x1080) @30 fps – Pixel clock up to 90 MHz – Two layers with programmable colour LUT MIPI DSI 2 data lanes up to 1 Gbps each
  • 2x32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input 2x16-bit advanced motor control timers 10x16-bit general-purpose timers (including 2 basic timers without PWM) 5x16-bit low-power timers RTC with sub-second accuracy and hardware calendar 2x4 Cortex-A7 system timers (secure, nonsecure, virtual, hypervisor) 1x SysTick M4 timer • 3x watchdogs 2x independent and window
  • HASH (MD5, SHA-1, SHA224, SHA256), HMAC 2x true random number generator (3 oscillators each) 2x CRC calculation unit
  • Arm CoreSight trace and debug: SWD and JTAG interfaces 8-Kbyte embedded trace buffer
  • 3072-bit fuses including 96-bit unique ID, up to 1184-bit available for user
  • All packages are ECOPACK2 compliant
In-Stock: 661
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QtyUnit PriceTotal Amount
1+$ 6.9188$ 6.92
10+$ 6.6336$ 66.34
30+$ 6.4602$ 193.81
100+$ 6.3144$ 631.44
Standard Packaging189/Full Tray
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