TI SN74HC165DBR
| Manufacturer | |
| MPN | SN74HC165DBR |
| LCSC Part # | C507236 |
| Packaging | SSOP-16-208mil |
| Customer # | |
| Key Attributes | 8-Bit Parallel-Load Shift Registers |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Shift Registers | |
| Manufacturer | TI | |
| Packaging | SSOP-16-208mil | |
| Operating temperature | -40℃~+125℃ | |
| Pd - Power Dissipation | - | |
| Voltage - Supply | 2V~6V | |
| Output Type | Complementary type | |
| Series | 74HC | |
| Number of Elements | - | |
| Output Current | 4mA | |
| Features | Asynchronous parallel load function | |
| Propagation Delay | 26ns@6V,50pF | |
| Function | Parallel or Serial to Serial |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The SNx4HC165 devices are 8-bit parallel-load shift registers that, when clocked, shift the data toward a serial (ΩH) output. Parallel-in access to each stage is provided by eight individual direct data (A - H) inputs that are enabled by a low level at the shift/load (SH/LD) input. The SNx4HC165 devices also feature a clock-inhibit (CLK INH) function and a complementary serial (ΩH) output.
Clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Because a low CLK and a low-to-high transition of CLK INH also accomplish clocking, CLK INH must be changed to the high level only while CLK is high. Parallel loading is inhibited when SH/LD is held high. While SH/LD is low, the parallel inputs to the register are enabled independently of the levels of the CLK, CLK INH, or serial (SER) inputs.
Features
- Wide Operating Voltage Range of 2 V to 6 V
- Outputs Can Drive Up to 10 LSTTL Loads
- Low Power Consumption, 80 μA Maximum ICC
- Typical fpd = 13 ns
- ±4 mA Output Drive at 5 V
- Low Input Current of 1 μA Maximum
- Complementary Outputs
- Direct Overriding Load (Data) Inputs
- Gated Clock Inputs
- Parallel-to-Serial Data Conversion
Applications
- Programable Logic Controllers
- Appliances
- Video Display Systems
- Output Expander
- Keyboards
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 0.4703 | $ 0.47 |
| 10+ | $ 0.3698 | $ 3.70 |
| 30+ | $ 0.3276 | $ 9.83 |
| 100+ | $ 0.2741 | $ 27.41 |
| 500+ | $ 0.2498 | $ 124.90 |
| 1,000+ | $ 0.2352 | $ 235.20 |
Standard Packaging2000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Shift Registers | |
| Manufacturer | TI | |
| Packaging | SSOP-16-208mil | |
| Operating temperature | -40℃~+125℃ | |
| Pd - Power Dissipation | - | |
| Voltage - Supply | 2V~6V | |
| Output Type | Complementary type | |
| Series | 74HC | |
| Number of Elements | - | |
| Output Current | 4mA | |
| Features | Asynchronous parallel load function | |
| Propagation Delay | 26ns@6V,50pF | |
| Function | Parallel or Serial to Serial |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The SNx4HC165 devices are 8-bit parallel-load shift registers that, when clocked, shift the data toward a serial (ΩH) output. Parallel-in access to each stage is provided by eight individual direct data (A - H) inputs that are enabled by a low level at the shift/load (SH/LD) input. The SNx4HC165 devices also feature a clock-inhibit (CLK INH) function and a complementary serial (ΩH) output.
Clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Because a low CLK and a low-to-high transition of CLK INH also accomplish clocking, CLK INH must be changed to the high level only while CLK is high. Parallel loading is inhibited when SH/LD is held high. While SH/LD is low, the parallel inputs to the register are enabled independently of the levels of the CLK, CLK INH, or serial (SER) inputs.
Features
- Wide Operating Voltage Range of 2 V to 6 V
- Outputs Can Drive Up to 10 LSTTL Loads
- Low Power Consumption, 80 μA Maximum ICC
- Typical fpd = 13 ns
- ±4 mA Output Drive at 5 V
- Low Input Current of 1 μA Maximum
- Complementary Outputs
- Direct Overriding Load (Data) Inputs
- Gated Clock Inputs
- Parallel-to-Serial Data Conversion
Applications
- Programable Logic Controllers
- Appliances
- Video Display Systems
- Output Expander
- Keyboards
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



