Nexperia 74AUP1G373GM,115
| Manufacturer | |
| MPN | 74AUP1G373GM,115 |
| LCSC Part # | C503399 |
| Packaging | XSON-6(1x1) |
| Customer # | |
| Key Attributes | D Latch 0.8V~3.6V 2.5ns XSON-6(1x1) Latches RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | Nexperia | |
| Packaging | XSON-6(1x1) | |
| Series | 74AUP | |
| Logic Type | D Latch | |
| Voltage - Supply | 0.8V~3.6V | |
| Operating Temperature | -40℃~+125℃ | |
| Current - Output Low(IOL) | 4mA | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | 4mA | |
| Propagation Delay | 2.5ns |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 5000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74AUP1G373 is a single D-type transparent latch; 3-state. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features
- Wide supply voltage range from 0.8 V to 3.6 V
- High noise immunity
- CMOS low power dissipation
- Low static power consumption; ICC = 0.9 μA (maximum)
- Overvoltage tolerant inputs to 3.6 V
- Low noise overshoot and undershoot < 10 % of VCC
- IOFF circuitry provides partial Power-down mode operation
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
- Complies with JEDEC standards:
- JESD8-12 (0.8 V to 1.3 V)
- JESD8-11 (0.9 V to 1.65 V)
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C (2.7 V to 3.6 V)
- ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 °C to +85 °C and -40 °C to +125 °C
Applications
- Low-power D-type transparent latch; 3-state
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 5+ | $ 0.1345 | $ 0.67 |
| 50+ | $ 0.1316 | $ 6.58 |
| 150+ | $ 0.1297 | $ 19.46 |
| 500+ | $ 0.1278 | $ 63.90 |
Standard Packaging5000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | Nexperia | |
| Packaging | XSON-6(1x1) | |
| Series | 74AUP | |
| Logic Type | D Latch | |
| Voltage - Supply | 0.8V~3.6V | |
| Operating Temperature | -40℃~+125℃ | |
| Current - Output Low(IOL) | 4mA | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | 4mA | |
| Propagation Delay | 2.5ns |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 5000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74AUP1G373 is a single D-type transparent latch; 3-state. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features
- Wide supply voltage range from 0.8 V to 3.6 V
- High noise immunity
- CMOS low power dissipation
- Low static power consumption; ICC = 0.9 μA (maximum)
- Overvoltage tolerant inputs to 3.6 V
- Low noise overshoot and undershoot < 10 % of VCC
- IOFF circuitry provides partial Power-down mode operation
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
- Complies with JEDEC standards:
- JESD8-12 (0.8 V to 1.3 V)
- JESD8-11 (0.9 V to 1.65 V)
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C (2.7 V to 3.6 V)
- ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 °C to +85 °C and -40 °C to +125 °C
Applications
- Low-power D-type transparent latch; 3-state
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



