EnergyMath EM74HC595D
| Manufacturer | EnergyMathAsian Brands |
| MPN | EM74HC595D |
| LCSC Part # | C49188224 |
| Packaging | SOP-16L |
| Customer # | |
| Key Attributes | 8-bit serial-in, serial or parallel-out shift register with output latches; 3-state |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Shift Registers | |
| Manufacturer | EnergyMath | |
| Packaging | SOP-16L | |
| Operating temperature | -40℃~+85℃ | |
| Voltage - Supply | 2.7V~6V | |
| Output Type | Tri-State | |
| Series | 74HC | |
| Number of Elements | 1 | |
| Output Current | 7.8mA | |
| Features | Asynchronous clear function;Output enable | |
| Propagation Delay | 15ns@6.0V,15pF | |
| Function | Serial-to-Parallel or Serial |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The EM74HC595 is an 8-bit serial-in/serial-or-parallel-out shift register with storage register and 3-state outputs. The shift register and storage register have separate clocks. The device features serial input and serial output for cascading, and has an asynchronous reset input. The active-low signal resets the shift register. Data is shifted on the low-to-high transition of the shift clock input. Data in the shift register is transferred to the storage register on the low-to-high transition of the storage clock input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. When the output enable input is low, the data in the storage register appears at the outputs. When the output enable input is high, the outputs are in a high-impedance off-state. Operation of the output enable input does not affect the state of the registers. The inputs include clamping diodes, which allow the use of current-limiting resistors to interface inputs to voltages exceeding VCC.
Features
- Wide operating voltage range: 2.7V ~ 6.0V
- High noise immunity
- CMOS low power consumption
- 8-bit serial input
- 8-bit serial or parallel output
- Storage register with tri-state output
- Shift register with direct clear function
- Latch-up performance exceeds 250mA
- JEDEC compliant: JESD8C (2.7V to 3.6V) and JESD7A (2.7V to 6.0V)
- ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 3500V; CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000V
- 8-bit serial-in, serial or parallel-out shift register with output latch and tri-state
- Multiple package options
- Operating temperature range: -40℃ ~ +85℃ and -40℃ ~ +125℃
Applications
- Serial-to-parallel data conversion
- Remote-controlled hold register
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.123 | $ 0.62 |
| 50+ | $ 0.0979 | $ 4.90 |
| 150+ | $ 0.0853 | $ 12.80 |
| 500+ | $ 0.0759 | $ 37.95 |
| 3,000+ | $ 0.0683 | $ 204.90 |
| 6,000+ | $ 0.0645 | $ 387.00 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Shift Registers | |
| Manufacturer | EnergyMath | |
| Packaging | SOP-16L | |
| Operating temperature | -40℃~+85℃ | |
| Voltage - Supply | 2.7V~6V | |
| Output Type | Tri-State | |
| Series | 74HC | |
| Number of Elements | 1 | |
| Output Current | 7.8mA | |
| Features | Asynchronous clear function;Output enable | |
| Propagation Delay | 15ns@6.0V,15pF | |
| Function | Serial-to-Parallel or Serial |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The EM74HC595 is an 8-bit serial-in/serial-or-parallel-out shift register with storage register and 3-state outputs. The shift register and storage register have separate clocks. The device features serial input and serial output for cascading, and has an asynchronous reset input. The active-low signal resets the shift register. Data is shifted on the low-to-high transition of the shift clock input. Data in the shift register is transferred to the storage register on the low-to-high transition of the storage clock input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. When the output enable input is low, the data in the storage register appears at the outputs. When the output enable input is high, the outputs are in a high-impedance off-state. Operation of the output enable input does not affect the state of the registers. The inputs include clamping diodes, which allow the use of current-limiting resistors to interface inputs to voltages exceeding VCC.
Features
- Wide operating voltage range: 2.7V ~ 6.0V
- High noise immunity
- CMOS low power consumption
- 8-bit serial input
- 8-bit serial or parallel output
- Storage register with tri-state output
- Shift register with direct clear function
- Latch-up performance exceeds 250mA
- JEDEC compliant: JESD8C (2.7V to 3.6V) and JESD7A (2.7V to 6.0V)
- ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 3500V; CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000V
- 8-bit serial-in, serial or parallel-out shift register with output latch and tri-state
- Multiple package options
- Operating temperature range: -40℃ ~ +85℃ and -40℃ ~ +125℃
Applications
- Serial-to-parallel data conversion
- Remote-controlled hold register
C49188224 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



