LCSC Electronics logoLCSC Electronics svg logo
Sign In
USD
Cart
EnergyMath EM74LVC00AD product image
  • EM74LVC00AD thumbnail 1
  • EM74LVC00AD thumbnail 2
  • EM74LVC00AD thumbnail 3
  • Pinout
  • Footprint
Images for reference only

EnergyMath EM74LVC00ADRoHS

Manufacturer
EnergyMathAsian Brands
MPN
EM74LVC00AD
LCSC Part #
C49188184
Packaging
SOP-14L
Customer #
Key Attributes
Quad 2-input NAND gate
Datasheetpdf iconEnergyMath EM74LVC00AD
In-Stock: 2,340
2,340 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
5+$ 0.1063$ 0.53
50+$ 0.0846$ 4.23
150+$ 0.0737$ 11.06
500+$ 0.0656$ 32.80
3,000+$ 0.059$ 177.00
6,000+$ 0.0558$ 334.80
Standard Packaging3000/Full Reel
Better price for more quantity?
$

Products Specifications

Show similar products (0) >
TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerEnergyMath
PackagingSOP-14L
Logic Family74LVC
Voltage - Supply1.65V~5.5V
Propagation Delay5.5ns@5.5V,15pF
Output Logic Level - Low650mV;450mV;600mV;800mV
FeaturesLocal shutdown mode;Overvoltage-tolerant input
Input Logic Level - Low120mV;700mV;800mV
Operating Temperature-40℃~+125℃
Input Logic Level - High1.08V;1.7V;2V
Output Logic Level - High1.05V;1.7V;2.05V;2.25V;3.5V
Quiescent Current(Iq)40uA
Current - Output High(IOH)32mA
Number of Channels4;2
Current - Output Low(IOL)32mA
Report an ErrorShow similar products (0) >

Additional Information

TypeDetails
Minimum5
Multiple5
Standard Packaging3000
Sales UnitPiece

Introduction

AI Translation

The EM74LVC00A is a quad 2-input NAND gate. Its inputs can be driven by 3.3V or 5V devices. This feature allows the device to be used as a level translator in mixed 3.3V and 5V environments. All inputs incorporate Schmitt-trigger action, enabling the circuit to tolerate slow input rise and fall times. The device fully supports partial power-down applications using the IOFF circuit. The IOFF circuit disables the outputs when the device is powered down, preventing potentially damaging reverse current from flowing through the device.

Features

AI Translation
  • Wide supply voltage range: 1.2V to 5.5V
  • Input overvoltage tolerance up to 5.5V
  • CMOS low power consumption
  • I<sub>OFF</sub> circuitry supports partial power-down mode operation
  • Latch-up performance exceeds 250mA
  • Direct interface with TTL levels
  • JEDEC compliant: JESD8-7 (1.65V to 1.95V), JESD8-5 (2.3V to 2.7V), JESD8C (2.7V to 3.6V), JESD36 (4.5V to 5.5V)
  • ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3A exceeds 6000V; CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000V
  • Multiple package options