EnergyMath EM74LVC1G02GV
| Manufacturer | EnergyMathAsian Brands |
| MPN | EM74LVC1G02GV |
| LCSC Part # | C49188159 |
| Packaging | SOT-23-5L |
| Customer # | |
| Key Attributes | 1.65V~5.5V 2.6ns@5V,50pF 4uA SOT-23-5L Gates and Inverters RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | EnergyMath | |
| Packaging | SOT-23-5L | |
| Logic Family | 74LVC | |
| Voltage - Supply | 1.65V~5.5V | |
| Propagation Delay | 2.6ns@5V,50pF | |
| Output Logic Level - Low | 800mV | |
| Features | Local shutdown mode;Overvoltage-tolerant input | |
| Input Logic Level - Low | 700mV;800mV | |
| Operating Temperature | -40℃~+125℃ | |
| Input Logic Level - High | 1.7V;2V | |
| Output Logic Level - High | 1.2V;1.9V;2.2V;2.3V;3.8V | |
| Quiescent Current(Iq) | 4uA | |
| Current - Output High(IOH) | 24mA | |
| Number of Channels | 1;2 | |
| Current - Output Low(IOL) | 24mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 10 |
| Multiple | 10 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The EM74LVC1G02 is a single 2-input NOR gate. Its inputs can be driven by 3.3V or 5V devices. This feature allows these devices to be used as level translators in mixed 3.3V and 5V environments. Schmitt-trigger action on all inputs makes the circuit tolerant of slower input rise and fall times. The device is fully specified for partial power-down applications using IOFF. The IOFF circuit disables the outputs, preventing potentially damaging reverse current flow through the device when it is powered down.
Features
- Wide supply voltage range: 1.65 V to 5.5 V
- Overvoltage-tolerant inputs up to 5.5 V
- High noise immunity
- CMOS low power consumption
- IOFF circuitry supports partial power-down mode operation
- Output drive capability ±24 mA (VCC = 3.0 V)
- Latch-up performance exceeds 100 mA
- Direct TTL-level interface
- JEDEC compliant: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V), JESD36 (4.5 V to 5.5 V)
- ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000 V, MM JESD22-A115C Class C exceeds 550 V, CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
- Multiple package options
| Qty | Unit Price | Total Amount |
|---|---|---|
| 10+ | $ 0.0544 | $ 0.54 |
| 100+ | $ 0.043 | $ 4.30 |
| 300+ | $ 0.0372 | $ 11.16 |
| 3,000+ | $ 0.0329 | $ 98.70 |
| 6,000+ | $ 0.0295 | $ 177.00 |
| 9,000+ | $ 0.0278 | $ 250.20 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | EnergyMath | |
| Packaging | SOT-23-5L | |
| Logic Family | 74LVC | |
| Voltage - Supply | 1.65V~5.5V | |
| Propagation Delay | 2.6ns@5V,50pF | |
| Output Logic Level - Low | 800mV | |
| Features | Local shutdown mode;Overvoltage-tolerant input | |
| Input Logic Level - Low | 700mV;800mV | |
| Operating Temperature | -40℃~+125℃ | |
| Input Logic Level - High | 1.7V;2V | |
| Output Logic Level - High | 1.2V;1.9V;2.2V;2.3V;3.8V | |
| Quiescent Current(Iq) | 4uA | |
| Current - Output High(IOH) | 24mA | |
| Number of Channels | 1;2 | |
| Current - Output Low(IOL) | 24mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 10 |
| Multiple | 10 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The EM74LVC1G02 is a single 2-input NOR gate. Its inputs can be driven by 3.3V or 5V devices. This feature allows these devices to be used as level translators in mixed 3.3V and 5V environments. Schmitt-trigger action on all inputs makes the circuit tolerant of slower input rise and fall times. The device is fully specified for partial power-down applications using IOFF. The IOFF circuit disables the outputs, preventing potentially damaging reverse current flow through the device when it is powered down.
Features
- Wide supply voltage range: 1.65 V to 5.5 V
- Overvoltage-tolerant inputs up to 5.5 V
- High noise immunity
- CMOS low power consumption
- IOFF circuitry supports partial power-down mode operation
- Output drive capability ±24 mA (VCC = 3.0 V)
- Latch-up performance exceeds 100 mA
- Direct TTL-level interface
- JEDEC compliant: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V), JESD36 (4.5 V to 5.5 V)
- ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000 V, MM JESD22-A115C Class C exceeds 550 V, CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
- Multiple package options
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



