EnergyMath EM74LVC1G09GW
| Manufacturer | EnergyMathAsian Brands |
| MPN | EM74LVC1G09GW |
| LCSC Part # | C49188141 |
| Packaging | SOT-353 |
| Customer # | |
| Key Attributes | 2-input AND gate; open drain |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | EnergyMath | |
| Packaging | SOT-353 | |
| Input Logic Level - High | - | |
| Input Logic Level - Low | - | |
| Features | Local shutdown mode | |
| Operating Temperature | -40℃~+125℃ | |
| Logic Family | 74LVC | |
| Output Logic Level - High | - | |
| Quiescent Current(Iq) | 4uA | |
| Voltage - Supply | 1.65V~5.5V | |
| Current - Output High(IOH) | - | |
| Number of Channels | 2;2 | |
| Output Logic Level - Low | 100mV;450mV;600mV;700mV;800mV | |
| Propagation Delay | 3.8ns@5.5V,50pF | |
| Current - Output Low(IOL) | 24mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 10 |
| Multiple | 10 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
EM74LVC1G09 is a single 2-input AND gate with open-drain output. Its inputs can be driven by 3.3V or 5V devices. This feature allows the device to be used as a level translator in mixed 3.3V and 5V environments. Schmitt-trigger action on all inputs makes the circuit tolerant of slower input rise and fall times. The device is fully specified for partial power-down applications using I_OFF. The I_OFF circuit disables the output, preventing potentially damaging backflow current when the device is powered down.
Features
- Wide supply voltage range: 1.65 V ~ 5.5 V
- 5V-tolerant outputs for interfacing with 5V logic
- High noise immunity
- CMOS low power consumption
- Open-drain output
- Inputs accept voltages up to 5V
- ±24 mA output drive capability (V_CC = 3.0V)
- Latch-up performance exceeds 100 mA
- Direct TTL-level interface compatible
- Compliant with JEDEC standards: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8-B/JESD36 (2.7 V to 3.6 V)
- ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000 V, MM JESD22-A115C Class C exceeds 550 V, CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
- Multiple package options
- 2-input AND gate with open-drain output
| Qty | Unit Price | Total Amount |
|---|---|---|
| 10+ | $ 0.0528 | $ 0.53 |
| 100+ | $ 0.042 | $ 4.20 |
| 300+ | $ 0.0366 | $ 10.98 |
| 3,000+ | $ 0.0326 | $ 97.80 |
| 6,000+ | $ 0.0293 | $ 175.80 |
| 9,000+ | $ 0.0277 | $ 249.30 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | EnergyMath | |
| Packaging | SOT-353 | |
| Input Logic Level - High | - | |
| Input Logic Level - Low | - | |
| Features | Local shutdown mode | |
| Operating Temperature | -40℃~+125℃ | |
| Logic Family | 74LVC | |
| Output Logic Level - High | - | |
| Quiescent Current(Iq) | 4uA | |
| Voltage - Supply | 1.65V~5.5V | |
| Current - Output High(IOH) | - | |
| Number of Channels | 2;2 | |
| Output Logic Level - Low | 100mV;450mV;600mV;700mV;800mV | |
| Propagation Delay | 3.8ns@5.5V,50pF | |
| Current - Output Low(IOL) | 24mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 10 |
| Multiple | 10 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
EM74LVC1G09 is a single 2-input AND gate with open-drain output. Its inputs can be driven by 3.3V or 5V devices. This feature allows the device to be used as a level translator in mixed 3.3V and 5V environments. Schmitt-trigger action on all inputs makes the circuit tolerant of slower input rise and fall times. The device is fully specified for partial power-down applications using I_OFF. The I_OFF circuit disables the output, preventing potentially damaging backflow current when the device is powered down.
Features
- Wide supply voltage range: 1.65 V ~ 5.5 V
- 5V-tolerant outputs for interfacing with 5V logic
- High noise immunity
- CMOS low power consumption
- Open-drain output
- Inputs accept voltages up to 5V
- ±24 mA output drive capability (V_CC = 3.0V)
- Latch-up performance exceeds 100 mA
- Direct TTL-level interface compatible
- Compliant with JEDEC standards: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8-B/JESD36 (2.7 V to 3.6 V)
- ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000 V, MM JESD22-A115C Class C exceeds 550 V, CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
- Multiple package options
- 2-input AND gate with open-drain output
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



