EnergyMath EM74LVC2G06GV
| Manufacturer | EnergyMathAsian Brands |
| MPN | EM74LVC2G06GV |
| LCSC Part # | C49188104 |
| Packaging | SOT-23-6L |
| Customer # | |
| Key Attributes | Schmitt trigger 1.65V~5.5V 2.5ns@3.3V,50pF 2 4uA SOT-23-6L Gates and Inverters RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | EnergyMath | |
| Packaging | SOT-23-6L | |
| Input Type | Schmitt trigger | |
| Logic Family | 74LVC | |
| Voltage - Supply | 1.65V~5.5V | |
| Propagation Delay | 2.5ns@3.3V,50pF | |
| Output Logic Level - Low | 800mV | |
| Features | Power shutdown protection;Noise suppression function | |
| Input Logic Level - High | 1.7V;2V | |
| Input Logic Level - Low | 700mV;800mV | |
| Operating Temperature | -40℃~+125℃ | |
| Number of Circuits | 2 | |
| Output Logic Level - High | - | |
| Quiescent Current(Iq) | 4uA | |
| Current - Output High(IOH) | - | |
| Number of Channels | - | |
| Current - Output Low(IOL) | 24mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 10 |
| Multiple | 10 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The EM74LVC2G06 is a dual inverter with open-drain outputs. Its inputs can be driven by 3.3 V or 5 V devices. This feature allows the device to be used as a level translator in mixed 3.3 V and 5 V environments. Schmitt-trigger action on all inputs makes the circuit tolerant of slower input rise and fall times. The device is fully specified for partial power-down applications using I<sub>OFF</sub>. The I<sub>OFF</sub> circuit disables the outputs, preventing potentially destructive backflow current when the device is powered down.
Features
- Wide supply voltage range: 1.65 V to 5.5 V
- Input overvoltage tolerance up to 5.5 V
- High noise immunity
- Low-power CMOS
- IOFF circuitry for partial power-down operation
- 24 mA output drive capability (VCC = 3.0 V)
- Latch-up performance exceeds 100 mA
- Direct interface with TTL levels
- JEDEC compliant: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V), JESD36 (4.5 V to 5.5 V)
- ESD protection: Human Body Model per ANSI/ESDA/JEDEC JS-001 Class 3B, exceeds 8000 V; Machine Model per JESD22-A115C Class C, exceeds 550 V; Charged Device Model per ANSI/ESDA/JEDEC JS-002 Class C3, exceeds 2000 V
- Multiple package options
| Qty | Unit Price | Total Amount |
|---|---|---|
| 10+ | $ 0.0551 | $ 0.55 |
| 100+ | $ 0.0434 | $ 4.34 |
| 300+ | $ 0.0375 | $ 11.25 |
| 3,000+ | $ 0.0331 | $ 99.30 |
| 6,000+ | $ 0.0296 | $ 177.60 |
| 9,000+ | $ 0.0278 | $ 250.20 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | EnergyMath | |
| Packaging | SOT-23-6L | |
| Input Type | Schmitt trigger | |
| Logic Family | 74LVC | |
| Voltage - Supply | 1.65V~5.5V | |
| Propagation Delay | 2.5ns@3.3V,50pF | |
| Output Logic Level - Low | 800mV | |
| Features | Power shutdown protection;Noise suppression function | |
| Input Logic Level - High | 1.7V;2V | |
| Input Logic Level - Low | 700mV;800mV | |
| Operating Temperature | -40℃~+125℃ | |
| Number of Circuits | 2 | |
| Output Logic Level - High | - | |
| Quiescent Current(Iq) | 4uA | |
| Current - Output High(IOH) | - | |
| Number of Channels | - | |
| Current - Output Low(IOL) | 24mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 10 |
| Multiple | 10 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The EM74LVC2G06 is a dual inverter with open-drain outputs. Its inputs can be driven by 3.3 V or 5 V devices. This feature allows the device to be used as a level translator in mixed 3.3 V and 5 V environments. Schmitt-trigger action on all inputs makes the circuit tolerant of slower input rise and fall times. The device is fully specified for partial power-down applications using I<sub>OFF</sub>. The I<sub>OFF</sub> circuit disables the outputs, preventing potentially destructive backflow current when the device is powered down.
Features
- Wide supply voltage range: 1.65 V to 5.5 V
- Input overvoltage tolerance up to 5.5 V
- High noise immunity
- Low-power CMOS
- IOFF circuitry for partial power-down operation
- 24 mA output drive capability (VCC = 3.0 V)
- Latch-up performance exceeds 100 mA
- Direct interface with TTL levels
- JEDEC compliant: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V), JESD36 (4.5 V to 5.5 V)
- ESD protection: Human Body Model per ANSI/ESDA/JEDEC JS-001 Class 3B, exceeds 8000 V; Machine Model per JESD22-A115C Class C, exceeds 550 V; Charged Device Model per ANSI/ESDA/JEDEC JS-002 Class C3, exceeds 2000 V
- Multiple package options
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



