WCH CH395F
| Manufacturer | WCHAsian Brands |
| MPN | CH395F |
| LCSC Part # | C49118552 |
| Packaging | QFN-32(4x4) |
| Customer # | |
| Key Attributes | Ethernet protocol stack chip |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Power Management (PMIC)/Power Over Ethernet (PoE) Controllers | |
| Manufacturer | WCH | |
| Packaging | QFN-32(4x4) | |
| Features | Low-power mode;Wake-up function;Power-on reset;Programmable LED indication;Support multicast filtering | |
| Ethernet Speed Standards | 10BASE-T;100BASE-TX | |
| Integrated PHY | Yes | |
| Communication Interface | Parallel port;SPI;Serial port | |
| Memory Space | 24KB | |
| Voltage - Supply | 3.3V;2.5V;1.8V |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 490 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
CH395 is an Ethernet protocol stack management chip designed for MCU systems to implement Ethernet communication. The chip integrates a 10/100M Ethernet MAC layer and PHY transceiver, fully compliant with IEEE802.3, and features built-in network protocol stack firmware including IP, ARP, ICMP, UDP, and TCP. MCU systems can conveniently perform network communication via CH395. The chip supports three communication interfaces: 8-bit parallel interface, SPI, and asynchronous serial port, allowing MCUs, DSPs, or MPUs to control CH395 for Ethernet communication through any of these interfaces.
Features
- Integrated Ethernet MAC and PHY transceiver
- Supports 10/100M speeds, full/half-duplex auto-negotiation, IEEE 802.3 compliant
- Supports MDI/MDIX auto-crossover
- I/O ports support 3.3V, 2.5V, 1.8V supply voltages, compatible with multiple MCU voltage standards
- Built-in network transformer center tap and crystal oscillator matching capacitors, simplifying peripheral circuitry
- Built-in TCP/IP stack, supports IPv4, ARP, ICMP, UDP, and TCP protocols
- Supports DHCP automatic IP address acquisition
- 8 independent Socket connections with simultaneous transmit/receive capability
- Supports MACRAW raw frame mode and IPRAW raw IP packet mode
- SPI device interface up to 40MHz (Mode 0 or 3), MSB-first transmission
- High-speed 8-bit passive parallel interface for MCU parallel data bus connection
- Asynchronous serial port up to 10Mbps for MCU serial connection, supports dynamic baud rate adjustment
- CH395F serial port supports RS485 auto-switching and hardware flow control
- Sleep mode support
- Built-in 24KB RAM for Ethernet data transmission/reception, configurable TX/RX buffer per Socket
- Built-in 4KB EEPROM
- 8 general-purpose I/O pins
- Available in QFN32, LQFP64M, and LQFP128 lead-free packages
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 2.672 | $ 2.67 |
| 10+ | $ 2.2863 | $ 22.86 |
| 30+ | $ 2.0449 | $ 61.35 |
| 100+ | $ 1.797 | $ 179.70 |
| 490+ | $ 1.6852 | $ 825.75 |
| 980+ | $ 1.6366 | $ 1603.87 |
Standard Packaging490/Full Tray | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Power Management (PMIC)/Power Over Ethernet (PoE) Controllers | |
| Manufacturer | WCH | |
| Packaging | QFN-32(4x4) | |
| Features | Low-power mode;Wake-up function;Power-on reset;Programmable LED indication;Support multicast filtering | |
| Ethernet Speed Standards | 10BASE-T;100BASE-TX | |
| Integrated PHY | Yes | |
| Communication Interface | Parallel port;SPI;Serial port | |
| Memory Space | 24KB | |
| Voltage - Supply | 3.3V;2.5V;1.8V |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 490 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
CH395 is an Ethernet protocol stack management chip designed for MCU systems to implement Ethernet communication. The chip integrates a 10/100M Ethernet MAC layer and PHY transceiver, fully compliant with IEEE802.3, and features built-in network protocol stack firmware including IP, ARP, ICMP, UDP, and TCP. MCU systems can conveniently perform network communication via CH395. The chip supports three communication interfaces: 8-bit parallel interface, SPI, and asynchronous serial port, allowing MCUs, DSPs, or MPUs to control CH395 for Ethernet communication through any of these interfaces.
Features
- Integrated Ethernet MAC and PHY transceiver
- Supports 10/100M speeds, full/half-duplex auto-negotiation, IEEE 802.3 compliant
- Supports MDI/MDIX auto-crossover
- I/O ports support 3.3V, 2.5V, 1.8V supply voltages, compatible with multiple MCU voltage standards
- Built-in network transformer center tap and crystal oscillator matching capacitors, simplifying peripheral circuitry
- Built-in TCP/IP stack, supports IPv4, ARP, ICMP, UDP, and TCP protocols
- Supports DHCP automatic IP address acquisition
- 8 independent Socket connections with simultaneous transmit/receive capability
- Supports MACRAW raw frame mode and IPRAW raw IP packet mode
- SPI device interface up to 40MHz (Mode 0 or 3), MSB-first transmission
- High-speed 8-bit passive parallel interface for MCU parallel data bus connection
- Asynchronous serial port up to 10Mbps for MCU serial connection, supports dynamic baud rate adjustment
- CH395F serial port supports RS485 auto-switching and hardware flow control
- Sleep mode support
- Built-in 24KB RAM for Ethernet data transmission/reception, configurable TX/RX buffer per Socket
- Built-in 4KB EEPROM
- 8 general-purpose I/O pins
- Available in QFN32, LQFP64M, and LQFP128 lead-free packages
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



