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Qorvo QPL9503TR7 product image
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Qorvo QPL9503TR7RoHS

Manufacturer
MPN
QPL9503TR7
LCSC Part #
C470924
Packaging
DFN-8-EP(2x2)
Customer #
Key Attributes
QPL9503 - Flat Gain, High Linearity, Ultra-Low Noise Amplifier
Datasheetpdf iconQorvo QPL9503TR7
In-Stock: 887
887 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 4.0154$ 4.02
10+$ 3.409$ 34.09
30+$ 3.0497$ 91.49
100+$ 2.6856$ 268.56
500+$ 2.5165$ 1258.25
1,000+$ 2.4417$ 2441.70
Standard Packaging2500/Full Reel
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Products Specifications

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TypeDescription
CategoryRF and Wireless/RF Amplifiers
ManufacturerQorvo
PackagingDFN-8-EP(2x2)
Voltage - Supply3.3V~5.25V
Frequency Range600MHz~6GHz
Operating Temperature-40℃~+105℃
Gain21.6dB
Input Return Loss10dB
Output Return Loss9dB
Noise Figure0.9dB
FeaturesLow-power mode
IP335.5dBm
P1dB19dBm
Current - Supply56mA

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

The QPL9503 is a flat-gain, high-linearity, ultra-low noise amplifier in a small 2×2 mm surface-mount package. The LNA provides a gain flatness of 2 dB (peak-to-peak) over a wide bandwidth from 3 to 6 GHz. At 5.5 GHz, the amplifier typically provides 21.6 dB gain, +35.5 dBm OIP3 at a 56mA bias setting, and 0.95 dB noise figure. The LNA can be biased from a single positive supply ranging from 3.3 to 5 volts. The device is housed in a green/RoHS-compliant industry-standard 2x2 mm package. The QPL9503 is internally matched using a high performance E-pHEMT process and only requires five external components for operation from a single positive supply: an external RF choke and blocking/bypass capacitors and a bias resistor going to pin 1. This LNA integrates a shut-down biasing capability to allow for operation in TDD applications. The QPL9503 is optimized for linear performance across the 3 to 6 GHz frequency band but can operate down to 600 MHz. 8 Pin 2X2 mm DFN Package

Features

AI Translation
  • 0.6 - 6 GHz Operational Bandwidth
  • Ultra low noise figure, 0.95 dB NF @ 5.5 GHz
  • Bias adjustable for linearity optimization
  • 35.5 dBm OIP3 at 65mA IDD
  • Shut-down mode pin with 1.8V TTL logic
  • Unconditionally stable
  • Integrated shutdown control pin
  • Maintains OFF state with high Pin drive
  • +3V to +5V supply; does not require -Vgg

Applications

AI Translation
  • 4.5G, 5G Massive MIMO
  • Repeaters / DAS
  • Mobile Infrastructure LTE-U / LAA
  • L-band, S-band, C-band radios General Purpose Wireless TDD or FDD systems