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XBLW SN74LS390N(XBLW)RoHS

Manufacturer
XBLWAsian Brands
MPN
SN74LS390N(XBLW)
LCSC Part #
C47021210
Packaging
DIP-16
Customer #
Key Attributes
Dual Decade Ripple Counter
Datasheetpdf iconXBLW SN74LS390N(XBLW)
In-Stock: 85
85 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
1+$ 0.7227$ 0.72
10+$ 0.5811$ 5.81
25+$ 0.5111$ 12.78
100+$ 0.4411$ 44.11
500+$ 0.4004$ 200.20
1,000+$ 0.3776$ 377.60
Standard Packaging25/Full Tube
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Counters, Dividers
ManufacturerXBLW
PackagingDIP-16
Number of Bits per Element4
Voltage - Supply2V~6V
DirectionUp Counter
Trigger TypeFalling Edge
Timing-
Operating Temperature-20℃~+85℃
ResetAsynchronous
Number of Elements2
Propagation Delay14ns@6V,50pF
Count Rate35MHz
FeaturesProgrammable divide ratio;Reset function

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging25
Sales UnitPiece

Introduction

AI Translation

The SN74LS390 is a dual 4-bit decade ripple counter divided into four independent clocked sections. The counter contains two divide-by-2 sections and two divide-by-5 sections. These sections share an asynchronous master reset input (nMR) and can be used in BCD decade or binary-coded quinary configurations. If the master reset inputs 1MR and 2MR are used to simultaneously clear all 8 bits of the counter, multiple counting configurations can be realized within a single package. The section clocks nCP0 and nCP1 support ripple counter or frequency division applications, enabling divide ratios of 2, 4, 5, 10, 20, 25, 50, or 100. The high-to-low transition of clock inputs nCP0 and nCP1 triggers each section. For BCD decade operation, the nQ0 output is connected to the nCP1 input of the divide-by-5 section. For binary-coded quinary decade operation, the nQ3 output is connected to the nCP0 input, and nQ0 becomes the decade output. A HIGH on the nMR input overrides the clock and forces all four outputs LOW. Inputs include clamping diodes to support interfacing inputs to voltages exceeding VCC using current-limiting resistors.

Features

AI Translation
  • Dual BCD decade or binary divide-by-five counters
  • Single device configurable as divide-by-2, 4, 5, 10, 20, 25, 50, or 100 divider
  • Two master reset inputs for independent clearing of each decade counter
  • Operating temperature range: -20°C ~ +85°C
  • Package options: DIP-16, SOP-16, TSSOP-16