XBLW SN74LS390N(XBLW)
| Manufacturer | XBLWAsian Brands |
| MPN | SN74LS390N(XBLW) |
| LCSC Part # | C47021210 |
| Packaging | DIP-16 |
| Customer # | |
| Key Attributes | Dual Decade Ripple Counter |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Counters, Dividers | |
| Manufacturer | XBLW | |
| Packaging | DIP-16 | |
| Number of Bits per Element | 4 | |
| Voltage - Supply | 2V~6V | |
| Direction | Up Counter | |
| Trigger Type | Falling Edge | |
| Timing | - | |
| Operating Temperature | -20℃~+85℃ | |
| Reset | Asynchronous | |
| Number of Elements | 2 | |
| Propagation Delay | 14ns@6V,50pF | |
| Count Rate | 35MHz | |
| Features | Programmable divide ratio;Reset function |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 25 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The SN74LS390 is a dual 4-bit decade ripple counter divided into four independent clocked sections. The counter contains two divide-by-2 sections and two divide-by-5 sections. These sections share an asynchronous master reset input (nMR) and can be used in BCD decade or binary-coded quinary configurations. If the master reset inputs 1MR and 2MR are used to simultaneously clear all 8 bits of the counter, multiple counting configurations can be realized within a single package. The section clocks nCP0 and nCP1 support ripple counter or frequency division applications, enabling divide ratios of 2, 4, 5, 10, 20, 25, 50, or 100. The high-to-low transition of clock inputs nCP0 and nCP1 triggers each section. For BCD decade operation, the nQ0 output is connected to the nCP1 input of the divide-by-5 section. For binary-coded quinary decade operation, the nQ3 output is connected to the nCP0 input, and nQ0 becomes the decade output. A HIGH on the nMR input overrides the clock and forces all four outputs LOW. Inputs include clamping diodes to support interfacing inputs to voltages exceeding VCC using current-limiting resistors.
Features
- Dual BCD decade or binary divide-by-five counters
- Single device configurable as divide-by-2, 4, 5, 10, 20, 25, 50, or 100 divider
- Two master reset inputs for independent clearing of each decade counter
- Operating temperature range: -20°C ~ +85°C
- Package options: DIP-16, SOP-16, TSSOP-16
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 0.7227 | $ 0.72 |
| 10+ | $ 0.5811 | $ 5.81 |
| 25+ | $ 0.5111 | $ 12.78 |
| 100+ | $ 0.4411 | $ 44.11 |
| 500+ | $ 0.4004 | $ 200.20 |
| 1,000+ | $ 0.3776 | $ 377.60 |
Standard Packaging25/Full Tube | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Counters, Dividers | |
| Manufacturer | XBLW | |
| Packaging | DIP-16 | |
| Number of Bits per Element | 4 | |
| Voltage - Supply | 2V~6V | |
| Direction | Up Counter | |
| Trigger Type | Falling Edge | |
| Timing | - | |
| Operating Temperature | -20℃~+85℃ | |
| Reset | Asynchronous | |
| Number of Elements | 2 | |
| Propagation Delay | 14ns@6V,50pF | |
| Count Rate | 35MHz | |
| Features | Programmable divide ratio;Reset function |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 25 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The SN74LS390 is a dual 4-bit decade ripple counter divided into four independent clocked sections. The counter contains two divide-by-2 sections and two divide-by-5 sections. These sections share an asynchronous master reset input (nMR) and can be used in BCD decade or binary-coded quinary configurations. If the master reset inputs 1MR and 2MR are used to simultaneously clear all 8 bits of the counter, multiple counting configurations can be realized within a single package. The section clocks nCP0 and nCP1 support ripple counter or frequency division applications, enabling divide ratios of 2, 4, 5, 10, 20, 25, 50, or 100. The high-to-low transition of clock inputs nCP0 and nCP1 triggers each section. For BCD decade operation, the nQ0 output is connected to the nCP1 input of the divide-by-5 section. For binary-coded quinary decade operation, the nQ3 output is connected to the nCP0 input, and nQ0 becomes the decade output. A HIGH on the nMR input overrides the clock and forces all four outputs LOW. Inputs include clamping diodes to support interfacing inputs to voltages exceeding VCC using current-limiting resistors.
Features
- Dual BCD decade or binary divide-by-five counters
- Single device configurable as divide-by-2, 4, 5, 10, 20, 25, 50, or 100 divider
- Two master reset inputs for independent clearing of each decade counter
- Operating temperature range: -20°C ~ +85°C
- Package options: DIP-16, SOP-16, TSSOP-16
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



