Infineon/CYPRESS S29GL064N90TFI010

The S29GL-N family of devices are 3.0-Volt single-power Flash memory manufactured using 110 nm MirrorBit technology. The S29GL064N is a 64-Mb device organized as 4,194,304 words or 8,388,608 bytes. The S29GL032N is a 32-Mb device organized as 2,097,152 words or 4,194,304 bytes. Depending on the model number, the devices have 16-bit wide data bus only, or a 16-bit wide data bus that can also function as an 8-bit wide data bus by using the BYTE# input. The devices can be programmed either in the host system or in standard EPROM programmers. Access times as fast as 90 ns are available. Each access time has a specific operating voltage range (VCC) as specified in the Product Selector Guide and the Ordering Information–S29GL032N, and Ordering Information– S29GL064N. Package offerings include 48-pin TSOP, 56-pin TSOP, 48-ball fine-pitch BGA and 64-ball Fortified BGA, depending on model number. Each device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. Each device requires only a single 3.0-Volt power supply for both read and write functions. In addition to a VCC input, a high-voltage accelerated program (ACC) feature provides shorter programming times through increased voltage on the WP#/ACC or ACC input. This feature is intended to facilitate factory throughput during system production, but may also be used in the field if desired. The device is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands are written to the device using standard microprocessor write timing. Write cycles also internally latch addresses and data needed for the programming and erase operations. The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is fully erased when shipped from the factory. The Advanced Sector Protection features several levels of sector protection, which can disable both the program and erase operations in certain sectors. Persistent Sector Protection is a method that replaces the previous 12-volt controlled protection method. Password Sector Protection is a highly sophisticated protection method that requires a password before changes to certain sectors are permitted. Device programming and erasure are initiated through command sequences. Once a program or erase operation begins, the host system need only poll the DQ7 (Data# Polling) or DQ6 (toggle) status bits or monitor the Ready/Busy# (RY/BY#) output to determine whether the operation is complete. To facilitate programming, an Unlock Bypass mode reduces command sequence overhead by requiring only two write cycles to program data instead of four. Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions. The hardware sector protection feature disables both program and erase operations in any combination of sectors of memory. This can be achieved in-system or via programming equipment. The Erase Suspend/Erase Resume feature allows the host system to pause an erase operation in a given sector to read or program any other sector.

• Single power supply operation
• Manufactured on 110 nm MirrorBit process technology
• Secured Silicon Sector region: 128-word/256-byte sector for permanent, secure identification through an 8-word/16-byte random Electronic Serial Number, accessible through a command sequence; Programmed and locked at the factory or by the customer
• Flexible sector architecture: 64Mb (uniform sector models): One hundred twenty-eight 32 Kword (64 KB) sectors; 64 Mb (boot sector models): One hundred twenty-seven 32 Kword (64 KB) sectors + eight 4Kword (8KB) boot sectors; 32 Mb (uniform sector models): Sixty-four 32Kword (64 KB) sectors; 32 Mb (boot sector models): Sixty-three 32Kword (64 KB) sectors + eight 4Kword (8KB) boot sectors
• Enhanced VersatileI/O™ Control: All input levels (address, control, and DQ input levels) and outputs are determined by voltage on V10 input. V10 range is 1.65 to VCC
• Compatibility with JEDEC standards: Provides pin out and software compatibility for single-power supply flash, and superior inadvertent write protection
• 100,000 erase cycles typical per sector
• 20-year data retention typical
• High performance: 90 ns access time; 8-word/16-byte page read buffer; 25 ns page read time; 16-word/32-byte write buffer which reduces overall programming time for multiple-word updates
• Low power consumption: 25 mA typical initial read current, 1 mA typical page read current; 50 mA typical erase/program current; μA typical standby mode current
• Package options: 48-pin TSOP; 56-pin TSOP; 64-ball Fortified BGA; 48-ball fine-pitch BGA
• Software features: Advanced Sector Protection: offers Persistent Sector Protection and Password Sector Protection; Program Suspend & Resume: read other sectors before programming operation is completed; Erase Suspend & Resume: read/program other sectors before an erase operation is completed; Data# polling & toggle bits provide status; CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices; Unlock Bypass Program command reduces overall multiple-word programming time
• Hardware features: WP#/ACC input accelerates programming time (when high voltage is applied) for greater throughput during system production. Protects first or last sector regardless of sector protection settings on uniform sector models; Hardware reset input (RESET#) resets device; Ready/Busy# output (RY/BY#) detects program or erase cycle completion