ChipNobo SN74HC595DR-CN

SN74HC595DR-CN is a high-speed silicon-gate CMOS device with pin compatibility with low-power Schottky TTL. The device conforms to JEDEC standard 7A. The "595" is an 8-bit serial shift register with a storage register and 3-state outputs. The shift register and storage register have separate clocks. Data is shifted on the positive edge of the SHCP input. Data in each register is transferred to the storage register on the positive edge of the STCP input. If the two clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. The shift register has a serial input and a serial standard output for cascading. It also provides asynchronous reset for all 8 shift register stages. The storage register has 8 parallel 3-state bus driver outputs. Whenever the output enable input is LOW, the data in the storage register appears at the outputs.

• 8-bit serial input
• 8-bit serial or parallel output
• Storage register with 3-state outputs
• Shift register with direct clear
• 100MHz typical shift-out frequency
• Output capability: bus driver for parallel outputs; standard output for serial output

• Serial-to-parallel data conversion
• Remote control hold register