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onsemi MC74VHC74DTR2GRoHS

Manufacturer
MPN
MC74VHC74DTR2G
LCSC Part #
C464023
Packaging
TSSOP-14
Customer #
Key Attributes
Dual D-Type Flip-Flop with Set and Reset
Datasheetpdf icononsemi MC74VHC74DTR2G
In-Stock: 95
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QtyUnit PriceTotal Amount
5+$ 0.2058$ 1.03
50+$ 0.2014$ 10.07
150+$ 0.1984$ 29.76
500+$ 0.1954$ 97.70
Standard Packaging2500/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Flip Flops
Manufactureronsemi
PackagingTSSOP-14
Voltage - Supply2V~5.5V
Number of Bits per Element1
Output TypeComplementary type
Operating Temperature-55℃~+125℃
Series74VHC Series
Synchronous/AsynchronousAsynchronous
Number of Elements2
Current - Output High(IOH)8mA
Current - Output Low(IOL)8mA
Setup Time5ns
Quiescent Current2uA
Hold Time500ps
Propagation Delay9.3ns@5V,50pF
Trigger TypeRising Edge

Additional Information

TypeDetails
Minimum5
Multiple5
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

The MC74VHC74 is an advanced high speed CMOS D−type flip−flop fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The signal level applied to the D input is transferred to Q output during the positive going transition of the Clock pulse. Reset (RD(overline)) and Set (SD(overline)) are independent of the Clock (CP) and are accomplished by setting the appropriate input Low. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems.

Features

AI Translation
  • High Speed: fmax = 170 MHz (Typ) at VCC = 5 V
  • Low Power Dissipation: ICC = 2 μA (Max) at TA = 25℃
  • High Noise Immunity: VNI = VNIL = 28% VCC
  • Power Down Protection Provided on Inputs
  • Balanced Propagation Delays
  • Designed for 2.0 V to 5.5 V Operating Range
  • Low Noise: VOLP = 0.8 V (Max)
  • Pin and Function Compatible with Other Standard Logic Families
  • Latchup Performance Exceeds 300 mA
  • ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V
  • Chip Complexity: 128 FETs or 32 Equivalent Gates
  • NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
  • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant