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onsemi MC74VHC595DR2GRoHS

Manufacturer
MPN
MC74VHC595DR2G
LCSC Part #
C463315
Packaging
SOIC-16
Customer #
Key Attributes
8-Bit Shift Register with Output Storage Register (3-State)
Datasheetpdf icononsemi MC74VHC595DR2G
In-Stock: 67
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QtyUnit PriceTotal Amount
1+$ 0.7845$ 0.78
10+$ 0.7666$ 7.67
30+$ 0.7552$ 22.66
100+$ 0.7422$ 74.22
Standard Packaging2500/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Shift Registers
Manufactureronsemi
PackagingSOIC-16
Operating temperature-55℃~+125℃
Voltage - Supply2V~5.5V
Output TypeTri-State
Series74VHC
Number of Elements1
FeaturesAsynchronous clear function;Output enable
Propagation Delay10.2ns@5V,50pF
FunctionSerial-to-Serial or Parallel

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

The MC74VHC595 is an advanced high speed 8−bit shift register with an output storage register fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The MC74VHC595 contains an 8−bit static shift register which feeds an 8−bit storage register. Shift operation is accomplished on the positive going transition of the Shift Clock input (SCK). The output register is loaded with the contents of the shift register on the positive going transition of the Register Clock input (RCK). Since the RCK and SCK signals are independent, parallel outputs can be held stable during the shift operation. And, since the parallel outputs are 3−state, the VHC595 can be directly connected to an 8−bit bus. This register can be used in serial−to−parallel conversion, data receivers, etc. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7 V, allowing the interface of 5 V systems to 3 V systems.

Features

AI Translation
  • High Speed: f_max = 185 MHz (Typ) at V_CC = 5 V
  • Low Power Dissipation: I_CC = 4 μA (Max) at T_A = 25 °C
  • High Noise Immunity: V_NIH = V_NIL = 28% V_CC
  • Power Down Protection Provided on Inputs
  • Balanced Propagation Delays
  • Designed for 2 V to 5.5 V Operating Range
  • Low Noise: ΔV_OLP = 1.0 V (Max)
  • Pin and Function Compatible with Other Standard Logic Families
  • Latchup Performance Exceeds 300 mA
  • ESD Performance: HBM > 2000 V; Machine Model > 200 V
  • NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
  • These Devices are Pb−Free and are RoHS Compliant

Applications

AI Translation
  • serial−to−parallel conversion
  • data receivers