lingxingic SN74LS595DR(LX)

The SN74LS595 is an 8-bit serial-in, serial-or-parallel-out shift register with a storage register and 3-state outputs. The shift register and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) for cascading, along with an asynchronous reset MR input. A low level on MR resets the shift register. Data shifts on the rising edge of the SHCP input. Data in the shift register is transferred to the storage register on the rising edge of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. Whenever the output enable input (OE) is low, the data in the storage register appears at the outputs. A high level on OE causes the outputs to assume a high-impedance state. Changes on the OE input do not affect the state of the registers. Input clamping diodes are built in, allowing the use of current-limiting resistors to interface inputs to voltages exceeding VCC.

• Input level: CMOS
• 8-bit serial input
• 8-bit serial/parallel output
• Storage register with tri-state output, shift register with direct clear
• Operating temperature range: -40°C ~ +125°C
• Package: DIP16/SOP16/TSSOP16