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GR CD4541NS14ARDQRoHS

Manufacturer
GRAsian Brands
MPN
CD4541NS14ARDQ
LCSC Part #
C42375455
Packaging
SOP-14
Customer #
Key Attributes
CD4541 CMOS Programmable Timer High Voltage Type
Datasheetpdf iconGR CD4541NS14ARDQ
In-Stock: 3,945
3,945 In stock, ships now
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QtyUnit PriceTotal Amount
5+$ 0.0878$ 0.44
50+$ 0.078$ 3.90
150+$ 0.0731$ 10.97
500+$ 0.0694$ 34.70
2,500+$ 0.0665$ 166.25
5,000+$ 0.065$ 325.00
Standard Packaging4000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Clock/Timing/Programmable Timers and Oscillators
ManufacturerGR
PackagingSOP-14
Supply Current-
FeaturesBuilt-in crystal oscillator
Operating Temperature-40℃~+85℃
ProgrammableYes
Timer Number-
Frequency100kHz
Voltage - Supply3V~18V
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Additional Information

TypeDetails
Minimum5
Multiple5
Standard Packaging4000
Sales UnitPiece

Introduction

AI Translation

CD4541 programmable timer consists of a 16- stage binary counter, an oscillator that is controlled by external R-C components (2 resistors and a capacitor), an automatic power-on reset circuit, and output control logic. The counter increments on edge clock transitions and can also be reset via the MASTER RESET input. The output from this timer is the Q or Q output from the 8th,10th, 13th, or 16th counter stage. The desired stage is chosen using timeselect inputs A and B (see Frequency Select Table). The output is available in either of two modes selectable via the MODE input, pin 10 (see Truth Table). When this MODE input is a logic “1”, the output will be a continuous square wave having a frequency equal to the oscillator frequency divided by 2 to the power of N. With the MODE input set to logic 0 and after a MASTER RESET is initiated, the output (assuming Q output has been selected) changes from a low to a high state after 2 to the power of (N - 1) counts and remains in that state until another MASTER RESET pulse is applied or the MODE input is set to a logic “1”. Timing is initialized by setting the AUTO RESET input (pin 5) to logic 0 and turning power on. If pin 5 is set to logic “1”, the AUTO RESET circuit is disabled and counting will not start until after a positive MASTER RESET pulse is applied and returns to a low level. For reliable automatic power-on reset, VDD should be greater than 5V. The RC oscillator, shown in Figure 3.3, oscillates with a frequency determined by the RC network and is calculated using: f = 1 / (2.3 * R_TC * C_TC) Where f is between 1 kHz and 100 kHz and R5 >= 10 kΩ and R5 = 2 * R_TC

Features

AI Translation
  • Wide range of digital and analog signal levels: Digital: 3V to 18V
  • Low Symmetrical Output Resistance
  • Built-In Low-Power RC Oscillator
  • Oscillator Frequency Range . . . . DC to 100kHz
  • External Clock (Applied to Pin 3) can be Used Instead of Oscillator
  • Operates as 2 to the power of N Frequency Divider or as a Single-Transition Timer
  • Q/Q Select Provides Output Logic Level Flexibility
  • AUTO or MASTER RESET Disables Oscillator During Reset to Reduce Power Dissipation
  • Symmetrical Output Characteristics
  • 100% Tested for Quiescent Current at 18V
  • 5V, 10V, and 15V Parametric Ratings