Winbond W664GG6RB-06
| Manufacturer | WinbondAsian Brands |
| MPN | W664GG6RB-06 |
| LCSC Part # | C41866572 |
| Packaging | VFBGA-96(13x7.5) |
| Customer # | |
| Key Attributes | 1.14V~1.26V 4Gbit 1.6GHz DDR4 SDRAM VFBGA-96(13x7.5) Memory (ICs) RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | Winbond | |
| Packaging | VFBGA-96(13x7.5) | |
| Refresh Current | 2mA | |
| Voltage - Supply | 1.14V~1.26V | |
| Memory Size | 4Gbit | |
| Operating temperature | 0℃~+95℃ | |
| Clock Frequency | 1.6GHz | |
| Features | Auto self-refresh;Built-in temperature sensor;Auto precharge function;Asynchronous reset function;Data mask function;Write leveling function;Dynamic on-chip termination;ZQ calibration function;CRC function | |
| Memory Format | DDR4 SDRAM | |
| Current - Supply | - |
Additional Information
| Type | Details |
|---|---|
| Minimum | 12 |
| Multiple | 12 |
| Standard Packaging | 198 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
This product is a DDR4 SDRAM memory device in x16 configuration with a 96-ball VFBGA package. It supports high-speed data transfer and incorporates a wide range of advanced features to optimize system performance and reliability. The device includes a simplified state machine, fundamental read/write operation capabilities, and defines detailed reset and initialization procedures. Its operating modes are configurable via mode registers. Core features include burst length and order control, DLL enable/disable sequences, input clock frequency change adaptation, write leveling adjustment, and multiple temperature-controlled refresh modes. Additionally, it supports fine granularity refresh, multipurpose registers for DQ training, data mask, data bus inversion, ZQ calibration, DQ reference voltage training, per-DRAM addressability, command/address latency mode, CRC, command/address parity, gear-down mode, and programmable preamble and postamble. The device adheres to standard timing definitions for activate, precharge, and read operations.
Features
- Compliant with DDR4 SDRAM standard
- x16 data width, 96-ball VFBGA package
- Programmable burst length and burst order
- Integrated DLL with switchable modes for different operating conditions
- Input clock frequency variation support
- Write leveling for signal integrity optimization
- Multiple temperature-controlled refresh modes: normal temperature mode (-40℃ ≤ TCASE ≤ 85℃) and extended temperature mode (85℃ ≤ TCASE ≤ 105℃)
- Fine granularity refresh mode with adjustable refresh rate
- Multi-purpose registers for DQ training
- Data mask and data bus inversion (DBI) support
- ZQ calibration command for output drive and termination resistance optimization
- DQ reference voltage training
- Per-DRAM addressability
- Command address latency mode
- Integrated CRC for data integrity checking
- Command address parity with error log readback
- Gear-down mode
- Programmable write and read preamble
- Programmable write and read postamble
- Standard activate, precharge, and read operation timing compliance
| Qty | Unit Price | Total Amount |
|---|---|---|
| 12+ | $ 19.7834 | $ 237.40 |
| 120+ | $ 18.962 | $ 2275.44 |
| 360+ | $ 17.5391 | $ 6314.08 |
| 1,200+ | $ 16.2971 | $ 19556.52 |
Standard Packaging198/Full Tray | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | Winbond | |
| Packaging | VFBGA-96(13x7.5) | |
| Refresh Current | 2mA | |
| Voltage - Supply | 1.14V~1.26V | |
| Memory Size | 4Gbit | |
| Operating temperature | 0℃~+95℃ | |
| Clock Frequency | 1.6GHz | |
| Features | Auto self-refresh;Built-in temperature sensor;Auto precharge function;Asynchronous reset function;Data mask function;Write leveling function;Dynamic on-chip termination;ZQ calibration function;CRC function | |
| Memory Format | DDR4 SDRAM | |
| Current - Supply | - |
Additional Information
| Type | Details |
|---|---|
| Minimum | 12 |
| Multiple | 12 |
| Standard Packaging | 198 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
This product is a DDR4 SDRAM memory device in x16 configuration with a 96-ball VFBGA package. It supports high-speed data transfer and incorporates a wide range of advanced features to optimize system performance and reliability. The device includes a simplified state machine, fundamental read/write operation capabilities, and defines detailed reset and initialization procedures. Its operating modes are configurable via mode registers. Core features include burst length and order control, DLL enable/disable sequences, input clock frequency change adaptation, write leveling adjustment, and multiple temperature-controlled refresh modes. Additionally, it supports fine granularity refresh, multipurpose registers for DQ training, data mask, data bus inversion, ZQ calibration, DQ reference voltage training, per-DRAM addressability, command/address latency mode, CRC, command/address parity, gear-down mode, and programmable preamble and postamble. The device adheres to standard timing definitions for activate, precharge, and read operations.
Features
- Compliant with DDR4 SDRAM standard
- x16 data width, 96-ball VFBGA package
- Programmable burst length and burst order
- Integrated DLL with switchable modes for different operating conditions
- Input clock frequency variation support
- Write leveling for signal integrity optimization
- Multiple temperature-controlled refresh modes: normal temperature mode (-40℃ ≤ TCASE ≤ 85℃) and extended temperature mode (85℃ ≤ TCASE ≤ 105℃)
- Fine granularity refresh mode with adjustable refresh rate
- Multi-purpose registers for DQ training
- Data mask and data bus inversion (DBI) support
- ZQ calibration command for output drive and termination resistance optimization
- DQ reference voltage training
- Per-DRAM addressability
- Command address latency mode
- Integrated CRC for data integrity checking
- Command address parity with error log readback
- Gear-down mode
- Programmable write and read preamble
- Programmable write and read postamble
- Standard activate, precharge, and read operation timing compliance
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |



