Tudi M95M01-RMN6TP-TUDI

The M95M01 device supports the Serial Peripheral Interface (SPI) bus protocol, modes (0,0) and (1,1). The device contains an 8−bit instruction register. Reading data stored in the M95M01 is accomplished by simply providing the READ command and an address. Writing to the M95M01, in addition to a WRITE command, address and data, also requires enabling the device for writing by first setting certain bits in a Status Register. After a high to low transition on the ̅C̅S̅ input pin, the M95M01 will accept any one of the six instruction op−codes and will ignore all other possible 8−bit combinations. The communication protocol follows the timing from Figure 14. The M95M01 features an additional Identification Page (256 bytes) which can be accessed for Read and Write operations when the IPL bit from the Status Register is set to “1”. The user can also choose to make the Identification Page permanent write protected by setting the LIP bit from the Status Register (LIP = 1).

• Compatible with SPI bus serial interface (Positive Clock SPI modes)
• Schmitt trigger inputs for enhanced noise margin
• Single supply voltage: 2.8 V to 5.5 V
• 8 ms Write time
• Status Register
• Hardware Protection of the Status Register
• Self-timed programming cycle
• Adjustable size read-only EEPROM area
• Enhanced ESD Protection
• More than 1 000 000 Write cycles
• More than 40-year data retention
• Packages ECOPACK (RoHS compliant)