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Nexperia 74LVC2G08DP,125 product image
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Nexperia 74LVC2G08DP,125RoHS

Manufacturer
Nexperia
MPN
74LVC2G08DP,125
LCSC Part #
C406037
Packaging
TSSOP-8
Customer #
Key Attributes
Dual 2-input AND gate
Datasheetpdf iconNexperia 74LVC2G08DP,125
In-Stock: 5,255
5,255 In stock, ships now
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QtyUnit PriceTotal Amount
5+$ 0.345$ 1.73
50+$ 0.2678$ 13.39
150+$ 0.2347$ 35.21
500+$ 0.1934$ 96.70
3,000+$ 0.175$ 525.00
6,000+$ 0.164$ 984.00
Standard Packaging3000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerNexperia
PackagingTSSOP-8
FeaturesLocal shutdown mode;Overvoltage-tolerant input
Input Logic Level - Low700mV~800mV
Input Logic Level - High950mV~3.4V
Operating Temperature-40℃~+125℃
Logic Family74LVC Series
Output Logic Level - High-
Quiescent Current(Iq)4uA
Voltage - Supply1.65V~5.5V
Number of Channels2;2
Current - Output High(IOH)32mA
Output Logic Level - Low-
Propagation Delay3.8ns@5V,50pF
Current - Output Low(IOL)32mA
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Additional Information

TypeDetails
Minimum5
Multiple5
Standard Packaging3000
Sales UnitPiece

Introduction

AI Translation

The 74LVC2G08 is a dual 2-input AND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features

AI Translation
  • Wide supply voltage range from 1.65 V to 5.5 V
  • 5 V tolerant outputs for interfacing with 5 V logic
  • Overvoltage tolerant inputs to 5.5 V
  • IOFF circuitry provides partial Power-down mode operation
  • High noise immunity
  • ±24 mA output drive (VCC = 3.0 V)
  • CMOS low power dissipation
  • Complies with JEDEC standard: JESD8 - 7 (1.65 V to 1.95 V), JESD8 - 5 (2.3 V to 2.7 V), JESD8 - B/JESD36 (2.7 V to 3.6 V)
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS - 001 class 2 exceeds 2000 V
  • CDM: ANSI/ESDA/JEDEC JS - 002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃

Applications

AI Translation
  • Level translator for mixed 3.3V and 5V environments
  • Interface with 5V logic
  • Direct TTL-level interface