TI 5962-8772501RA
| Manufacturer | |
| MPN | 5962-8772501RA |
| LCSC Part # | C3827245 |
| Packaging | CDIP-20 |
| Customer # | |
| Key Attributes | 4.5V~5.5V 8 30ns@4.5V,50pF CDIP-20 Flip Flops |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | TI | |
| Packaging | CDIP-20 | |
| Operating Temperature | -55℃~+125℃ | |
| Voltage - Supply | 4.5V~5.5V | |
| Series | 54HCT Series | |
| Number of Bits per Element | 8 | |
| Output Type | - | |
| Current - Output High(IOH) | 4mA | |
| Current - Output Low(IOL) | 4mA | |
| Quiescent Current | 8uA | |
| Propagation Delay | 30ns@4.5V,50pF | |
| Trigger Type | Rising Edge |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 20 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The HC273 and HCT273 high-speed octal D-type flip-flops feature a direct clear input and are fabricated using silicon gate CMOS technology. They offer the low power consumption characteristics of standard CMOS ICs. Data at the D inputs is transferred to the Q outputs on the rising edge of the clock pulse. All eight flip-flops are controlled by a common clock (CLK) and a common reset (CLR). Reset is accomplished by a low voltage level, independent of the clock. All eight Q outputs can be reset to logic 0.
Features
- General clock and asynchronous controller reset
- Positive-edge triggered
- Buffered inputs
- Fan-out (over temperature range)
- Standard outputs: 10 LSTTL loads
- Bus driver outputs: 15 LSTTL loads
- Wide operating temperature range: -55℃ to 125℃
- Balanced propagation delays and transition times
- Significantly reduced power consumption compared to LSTTL logic ICs
- HC type:
- Operating voltage: 2V to 6V
- High noise immunity: NIL = 30%, NIH = 30% of VCC when VCC = 5V
- HCT type:
- Operating voltage: 4.5V to 5.5V
- Direct LSTTL input logic compatibility, VIL = 0.8V (max), VIH = 2V (min)
- CMOS input compatibility at VOL, VOH voltages, II ≤ 1 μA
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 16.7483 | $ 16.75 |
| 200+ | $ 6.4818 | $ 1296.36 |
| 500+ | $ 6.2545 | $ 3127.25 |
| 1,000+ | $ 6.1424 | $ 6142.40 |
Standard Packaging20/Full Tube | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | TI | |
| Packaging | CDIP-20 | |
| Operating Temperature | -55℃~+125℃ | |
| Voltage - Supply | 4.5V~5.5V | |
| Series | 54HCT Series | |
| Number of Bits per Element | 8 | |
| Output Type | - | |
| Current - Output High(IOH) | 4mA | |
| Current - Output Low(IOL) | 4mA | |
| Quiescent Current | 8uA | |
| Propagation Delay | 30ns@4.5V,50pF | |
| Trigger Type | Rising Edge |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 20 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The HC273 and HCT273 high-speed octal D-type flip-flops feature a direct clear input and are fabricated using silicon gate CMOS technology. They offer the low power consumption characteristics of standard CMOS ICs. Data at the D inputs is transferred to the Q outputs on the rising edge of the clock pulse. All eight flip-flops are controlled by a common clock (CLK) and a common reset (CLR). Reset is accomplished by a low voltage level, independent of the clock. All eight Q outputs can be reset to logic 0.
Features
- General clock and asynchronous controller reset
- Positive-edge triggered
- Buffered inputs
- Fan-out (over temperature range)
- Standard outputs: 10 LSTTL loads
- Bus driver outputs: 15 LSTTL loads
- Wide operating temperature range: -55℃ to 125℃
- Balanced propagation delays and transition times
- Significantly reduced power consumption compared to LSTTL logic ICs
- HC type:
- Operating voltage: 2V to 6V
- High noise immunity: NIL = 30%, NIH = 30% of VCC when VCC = 5V
- HCT type:
- Operating voltage: 4.5V to 5.5V
- Direct LSTTL input logic compatibility, VIL = 0.8V (max), VIH = 2V (min)
- CMOS input compatibility at VOL, VOH voltages, II ≤ 1 μA
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

