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MICROCHIP AT25256B-SSHL-T
| Manufacturer | |
| MPN | AT25256B-SSHL-T |
| LCSC Part # | C36901 |
| Packaging | SOIC-8 |
| Customer # | |
| Key Attributes | SPI Serial EEPROM |
| Datasheet |  MICROCHIP AT25256B-SSHL-T |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | MICROCHIP | |
| Packaging | SOIC-8 | |
| Voltage - Supply | 1.8V~5.5V | |
| Memory Size | 256Kbit | |
| Operating temperature | -40℃~+85℃ | |
| Clock Frequency | 20MHz | |
| Features | Hardware write protection function;Built-in write enable latch (WEL) | |
| Data Retention - TDR (Year) | 100 Years | |
| Write Cycle Time(tWC) | 5ms | |
| Write Cycle Endurance | 1,000,000 cycles | |
| Interface | SPI |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 4000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The Atmel AT25128B/256B provides 131,072/262,144 bits of Serial Electrically Erasable Programmable Read-Only Memory (EEPROM) organized as 16,384/32,768 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT25128B/256B is available in space saving JEDEC SOIC, TSSOP, UDFN, and VFBGA packages. The AT25128B/256B is enabled through the Chip Select pin (CS) and accessed via a 3-Wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely self-timed, and no separate erase cycle is required before write. Block Write protection is enabled by programming the status register with one of four blocks of Write Protection. Separate Program Enable and Program Disable instructions are provided for additional data protection. Hardware Data Protection is provided via the WP (overline) pin to protect against inadvertent write attempts. The HOLD (overline) pin may be used to suspend any serial communication without resetting the serial sequence.
Features
- Serial Peripheral Interface (SPI) Compatible
- Supports SPI Modes 0 (0,0) and 3 (1,1) Data Sheet Describes Mode 0 Operation
- Low-voltage and Standard-voltage Operation V_CC = 1.8V to 5.5V
- 20MHz Clock Rate (5V)
- 64-byte Page Mode and Byte Write Operation
- Block Write Protection Protect 1/4, 1/2, or Entire Array
- Write Protect (WP (overline)) Pin and Write Disable Instructions for Both Hardware and Software Data Protection
- Self-timed Write Cycle (5ms max)
- High Reliability Endurance: 1,000,000 Write Cycles Data Retention: 100 Years
- Green (Pb/Halogen-free/RoHS Compliant) Packaging Options
- Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 0.6178 | $ 0.62 |
| 10+ | $ 0.5043 | $ 5.04 |
| 30+ | $ 0.4492 | $ 13.48 |
| 100+ | $ 0.3924 | $ 39.24 |
| 500+ | $ 0.3584 | $ 179.20 |
| 1,000+ | $ 0.3422 | $ 342.20 |
Standard Packaging4000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | MICROCHIP | |
| Packaging | SOIC-8 | |
| Voltage - Supply | 1.8V~5.5V | |
| Memory Size | 256Kbit | |
| Operating temperature | -40℃~+85℃ | |
| Clock Frequency | 20MHz | |
| Features | Hardware write protection function;Built-in write enable latch (WEL) | |
| Data Retention - TDR (Year) | 100 Years | |
| Write Cycle Time(tWC) | 5ms | |
| Write Cycle Endurance | 1,000,000 cycles | |
| Interface | SPI |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 4000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The Atmel AT25128B/256B provides 131,072/262,144 bits of Serial Electrically Erasable Programmable Read-Only Memory (EEPROM) organized as 16,384/32,768 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT25128B/256B is available in space saving JEDEC SOIC, TSSOP, UDFN, and VFBGA packages. The AT25128B/256B is enabled through the Chip Select pin (CS) and accessed via a 3-Wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely self-timed, and no separate erase cycle is required before write. Block Write protection is enabled by programming the status register with one of four blocks of Write Protection. Separate Program Enable and Program Disable instructions are provided for additional data protection. Hardware Data Protection is provided via the WP (overline) pin to protect against inadvertent write attempts. The HOLD (overline) pin may be used to suspend any serial communication without resetting the serial sequence.
Features
- Serial Peripheral Interface (SPI) Compatible
- Supports SPI Modes 0 (0,0) and 3 (1,1) Data Sheet Describes Mode 0 Operation
- Low-voltage and Standard-voltage Operation V_CC = 1.8V to 5.5V
- 20MHz Clock Rate (5V)
- 64-byte Page Mode and Byte Write Operation
- Block Write Protection Protect 1/4, 1/2, or Entire Array
- Write Protect (WP (overline)) Pin and Write Disable Instructions for Both Hardware and Software Data Protection
- Self-timed Write Cycle (5ms max)
- High Reliability Endurance: 1,000,000 Write Cycles Data Retention: 100 Years
- Green (Pb/Halogen-free/RoHS Compliant) Packaging Options
- Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |