LCSC Electronics logoLCSC Electronics svg logo
Sign In
USD
TI ISO7220ADR product image
  • ISO7220ADR thumbnail 1
  • ISO7220ADR thumbnail 2
  • ISO7220ADR thumbnail 3
  • Pinout
  • Footprint
Images for reference only

TI ISO7220ADRRoHS

Manufacturer
MPN
ISO7220ADR
LCSC Part #
C36366
Packaging
SOIC-8
Customer #
Key Attributes
Dual Channel Digital Isolators
Datasheetpdf iconTI ISO7220ADR
In-Stock: 618
618 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
1+$ 1.6058$ 1.61
10+$ 1.3224$ 13.22
30+$ 1.1677$ 35.03
100+$ 0.9918$ 99.18
500+$ 0.9137$ 456.85
1,000+$ 0.8778$ 877.80
Standard Packaging2500/Full Reel
Better price for more quantity?
$

Products Specifications

Show similar products (0) >
TypeDescription
CategoryIsolators/Digital Isolators
ManufacturerTI
PackagingSOIC-8
FeaturesFail-safe output
CMTI(kV/us)50kV/us
Propagation Delay(tpd)10ns
Number of Forward Channels2
Voltage - Supply3V~5.5V;3V~5.5V
Number of Reverse Channels0
Operating Temperature-40℃~+125℃
Isolation Voltage(Vrms)2500
Data Rate(Max)150Mbps
Default OutputHigh Level

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

The ISO7220 and ISO7221 are dual-channel digital isolators. To facilitate PCB layout, the channels are oriented in the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic input and output buffer separated by TI’s silicon-dioxide (SiO₂) isolation barrier, providing galvanic isolation of up to 4000 Vₚₖ per VDE. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, and prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry.

A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure the proper dc level of the output. If this dc-refresh pulse is not received every 4 μs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.

Features

AI Translation
  • 1, 5, 25, and 150-Mbps Signaling Rate Options
  • Low Channel-to-Channel Output Skew; 1-ns max
  • Low Pulse-Width Distortion (PWD); 1-ns max
  • Low Jitter Content; 1 ns Typ at 150 Mbps
  • 50 kV/μs Typical Transient Immunity
  • Operates with 2.8-V (C-Grade), 3.3-V or 5-V Supplies
  • 4-kV ESD Protection
  • High Electromagnetic Immunity
  • -40°C to 125°C Operating Range
  • Typical 28-Year Life at Rated Voltage
  • VDE Basic Insulation with 4000 Vₚₖ Vᵢₒₜₘ, 560 Vₚₖ Vᵢₒᵣₘ per DIN EN 60747-5-5 (VDE 0884-5) and DIN EN 61010-1 (VDE 0411-1)
  • 2500 Vᵣₘₛ Isolation per UL 1577
  • CSA Approved for Component Acceptance Notice 5A and IEC 60950-1

Applications

AI Translation
  • Industrial Fieldbus Modbus
  • Profibus
  • DeviceNet
  • Data Buses
  • Computer Peripheral Interface
  • Servo Control Interface
  • Data Acquisition