ADI ADSP-2115BP-40
| Manufacturer | |
| MPN | ADSP-2115BP-40 |
| LCSC Part # | C3587992 |
| Packaging | PLCC-68(24.2x24.2) |
| Customer # | |
| Key Attributes | PLCC-68(24.2x24.2) DSP (Digital Signal Processors) |
| Datasheet |  ADI ADSP-2115BP-40 |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/DSP (Digital Signal Processors) | |
| Manufacturer | ADI | |
| Packaging | PLCC-68(24.2x24.2) | |
| Operating Temperature | -40℃~+85℃ | |
| Features | High-speed peripheral interface;RTC and timer;Interrupt response;Low-power mode;Parallel data channel |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 19 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The ADSP-2115 is a single chip microcomputer optimized for digital signal processing (DSP) and other high speed numeric processing applications. Its instruction set is fully compatible with all other ADSP-2100 family processors. It combines the complete ADSP-2100 base architecture (three computational units, data address generators and a program sequencer) with two serial ports, a programmable timer, extensive interrupt capabilities and on-chip program and data memory. The ADSP-2115 has 512 words of (16-bit) data memory RAM and 1K words of (24-bit) program memory RAM on chip. Fabricated in a high speed, double layer metal CMOS process, the ADSP-2115 operates with a 60 ns instruction cycle time. Every instruction can execute in a single cycle. The flexible architecture and comprehensive instruction set of the ADSP-2115 supports a high degree of operational parallelism. In one cycle the ADSP-2115 can:
- generate the next program address
- fetch the next instruction
- perform one or two data moves
- update one or two data address pointers
- perform a computational operation receive and transmit data via the two serial ports
Features
- Complete DSP Microcomputer ADSP-2101 Memory Variant 1K Words of On-Chip Program Memory RAM 512 Words of On-Chip Data Memory RAM
- 60 ns Instruction Cycle Time from 16.67 MHz Crystal
- ADSP-2100 Family Code & Function Compatible
- Two Double-Buffered Serial Ports Featuring Companding Hardware, Automatic Data Buffering and Multichannel Operation
- Programmable 16-Bit Interval Timer with Prescaler
- Programmable Wait State Generation
- Automatic Booting of Internal Program Memory from Byte-Wide External Memory, e.g., EPROM
- Single-Cycle Instruction Execution
- Multifunction Instructions
- Up to Three Edge- or Level-Sensitive External Interrupts
- Low Power Dissipation in Standby Mode
- Pin Compatible with ADSP-2101 and ADSP-2105
- 68-Lead PLCC, 80-Lead PQFP
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 16.9847 | $ 16.98 |
| 200+ | $ 6.5743 | $ 1314.86 |
| 500+ | $ 6.3429 | $ 3171.45 |
| 1,000+ | $ 6.2287 | $ 6228.70 |
Standard Packaging19/Full Tube | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/DSP (Digital Signal Processors) | |
| Manufacturer | ADI | |
| Packaging | PLCC-68(24.2x24.2) | |
| Operating Temperature | -40℃~+85℃ | |
| Features | High-speed peripheral interface;RTC and timer;Interrupt response;Low-power mode;Parallel data channel |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 19 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The ADSP-2115 is a single chip microcomputer optimized for digital signal processing (DSP) and other high speed numeric processing applications. Its instruction set is fully compatible with all other ADSP-2100 family processors. It combines the complete ADSP-2100 base architecture (three computational units, data address generators and a program sequencer) with two serial ports, a programmable timer, extensive interrupt capabilities and on-chip program and data memory. The ADSP-2115 has 512 words of (16-bit) data memory RAM and 1K words of (24-bit) program memory RAM on chip. Fabricated in a high speed, double layer metal CMOS process, the ADSP-2115 operates with a 60 ns instruction cycle time. Every instruction can execute in a single cycle. The flexible architecture and comprehensive instruction set of the ADSP-2115 supports a high degree of operational parallelism. In one cycle the ADSP-2115 can:
- generate the next program address
- fetch the next instruction
- perform one or two data moves
- update one or two data address pointers
- perform a computational operation receive and transmit data via the two serial ports
Features
- Complete DSP Microcomputer ADSP-2101 Memory Variant 1K Words of On-Chip Program Memory RAM 512 Words of On-Chip Data Memory RAM
- 60 ns Instruction Cycle Time from 16.67 MHz Crystal
- ADSP-2100 Family Code & Function Compatible
- Two Double-Buffered Serial Ports Featuring Companding Hardware, Automatic Data Buffering and Multichannel Operation
- Programmable 16-Bit Interval Timer with Prescaler
- Programmable Wait State Generation
- Automatic Booting of Internal Program Memory from Byte-Wide External Memory, e.g., EPROM
- Single-Cycle Instruction Execution
- Multifunction Instructions
- Up to Three Edge- or Level-Sensitive External Interrupts
- Low Power Dissipation in Standby Mode
- Pin Compatible with ADSP-2101 and ADSP-2105
- 68-Lead PLCC, 80-Lead PQFP
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | 3A991A3 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| ECCN | 3A991A3 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |