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TI CD74LPT16501AMT product image
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TI CD74LPT16501AMT

Manufacturer
MPN
CD74LPT16501AMT
LCSC Part #
C3587489
Packaging
TSSOP-56
Customer #
Key Attributes
2.7V~3.6V 24mA 5.1ns TSSOP-56 Universal Bus Functions
Datasheetpdf iconTI CD74LPT16501AMT
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Universal Bus Functions
ManufacturerTI
PackagingTSSOP-56
Logic FamilyCD74LPT
Operating Temperature-40℃~+85℃
Voltage - Supply2.7V~3.6V
Current - Output Low(IOL)24mA
Output TypeTri-State
Current - Output High(IOH)24mA
Quiescent Current0.1uA
Setup Time3ns
Propagation Delay5.1ns

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging1
Sales UnitPiece

Introduction

AI Translation

The CD74LPT16501 is an 18-bit registered bus transceiver featuring D-type latches and flip-flops, allowing data to flow in transparent, latched, and clocked modes. Output enables (OEAB and OEBA), latch enables (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs control data flow in each direction. When LEAB is HIGH, the device operates in transparent mode for A-to-B data flow. When LEAB is LOW, A data is latched if CLKAB is held at a HIGH or LOW logic level. If LEAB is LOW, A bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CLKAB. OEAB performs the output enable function at port B. Using OEBA, LEBA, and CLKBA, data flow from port B to port A operates similarly. This high-speed, low-power device features a feed-through architecture for easy board layout. The CD74LPT16501 can be driven by 3.3V or 5.0V devices, allowing it to serve as a translator in mixed 3.3V/5.0V systems.

Features

AI Translation
  • Advanced 0.6 micron CMOS technology
  • Compatible with LCX™ series, supporting 5V tolerant mixed-voltage operation
  • Inputs accept 3V or 5V
  • Outputs at 3V or connectable to 5V bus
  • Advanced low-power CMOS operation
  • Excellent output drive capability: balanced drive (24mA sink and source)
  • Pin-compatible with industry-standard double-density pinout
  • Low ground bounce output
  • Hysteresis on all inputs
  • Multiple center pins and distributed VCC/GND pins for minimized switching noise