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TI SN74LVC86APWRRoHS

Manufacturer
TI
MPN
SN74LVC86APWR
LCSC Part #
C350562
Packaging
TSSOP-14
Customer #
Key Attributes
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
Datasheetpdf iconTI SN74LVC86APWR
In-Stock: 80
80 In stock, ships now
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QtyUnit PriceTotal Amount
5+$ 0.3616$ 1.81
50+$ 0.2939$ 14.70
150+$ 0.2649$ 39.74
500+$ 0.2287$ 114.35
2,000+$ 0.2018$ 403.60
4,000+$ 0.1921$ 768.40
Standard Packaging2000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerTI
PackagingTSSOP-14
Features-
Input Logic Level - Low800mV
Operating Temperature-40℃~+125℃
Input Logic Level - High2V
Logic Family74LVC Series
Output Logic Level - High2.4V
Quiescent Current(Iq)1uA
Voltage - Supply1.65V~3.6V
Current - Output High(IOH)24mA
Number of Channels4;2
Output Logic Level - Low550mV
Propagation Delay4.4ns@3.3V,50pF
Current - Output Low(IOL)24mA
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Additional Information

TypeDetails
Minimum5
Multiple5
Standard Packaging2000
Sales UnitPiece

Introduction

AI Translation

The SN54LVC86A quadruple 2-input exclusive-OR gate is designed for 2.7 V to 3.6 V VCC operation, and the SN74LVC86A quadruple 2-input exclusive-OR gate is designed for 1.65 V to 3.6 V VCC operation. The 'LVC86A devices perform the Boolean function Y = A ⊕ B or Y = A(overline)B + A B(overline) in positive logic. A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V system environment.

Features

AI Translation
  • Operate From 1.65 V to 3.6 V
  • Specified From -40℃ to 85℃, -40℃ to 125℃, and -55℃ to 125℃
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.6 ns at 3.3 V
  • Typical VoLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25℃
  • Typical V0HV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25℃
  • Latch-Up Performance Exceeds ±50 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000 V Human-Body Model (A114-A)
    • 200 V Machine Model (A115-A)
    • 1000 V Charged-Device Model (C101)