AMD AM29825PC

The Am29821/823/825 bus interface registers are designed to eliminate the extra packages required to buffer existing registers and to provide additional data width for wider address/data paths or buses carrying parity. The Am29821 is a 10-bit-wide buffered version of the popular '374/'534 function. The Am29823 is a 9-bit-wide buffered register with clock enable (EN) and clear (CLR) functions, ideally suited for parity bus interfacing in high-performance microprogrammed systems. The Am29825 is an 8-bit buffered register featuring all the control functions of the '823, plus multiple output enables (OE1̄, OE2̄, OE3̄) to allow multi-user control of the interface, such as chip select (CS), direct memory access (DMA), and read/write (RD/WR). It is ideally suited for use as an output port requiring high IOL/IOH. All Am29800 high-performance interface family products are designed for high capacitive load drive capability while presenting low capacitive bus loading at both inputs and outputs. All inputs are Schottky diode inputs, and all outputs are designed for low capacitive bus loading in the high-impedance state.

• High-speed parallel register using positive edge-triggered D-type flip-flops
• Non-inverting CP-Y propagation delay typical value: 7.5 ns
• Inverting CP-Y propagation delay typical value: 7.5 ns
• Buffered common clock enable (EN)
• Buffered common asynchronous clear input (CLR)
• Three-state outputs glitch-free during power-up and power-down
• Output Schottky clamp to GND
• 48 mA commercial IoT application capability
• Low input/output capacitance
  • Input capacitance typical value: 6 pF
  • Output capacitance typical value: 8 pF
• Metastable-hardened registers
• High-level output current specified at 2.0 V and 2.4 V
• 24-pin 0.3-inch space-saving package
• IMOX high-performance ion-implanted oxide isolation process