Intel/Altera EPXA1F484I2

Part of the Altera Excalibur embedded processor PLD solutions, the family of ARM -based embedded-processor devices combines an unrivalled degree of integration and programmability. The ARMbased devices are outstanding embedded system development platforms, providing embedded-processor and PLD performance that is leading edge, yet cost efficient. The ARM-based family devices are offered in a variety of PLD device densities and memory sizes to fit a wide range of applications and requirements. Their high-performance, yet flexible, embedded architecture is ideal for compute-intensive and high data-bandwidth applications. Two AMBA-compliant AHB buses ensure that ARM-based embedded processor activity is unaffected by peripheral and memory operation. Three bidirectional AHB bridges enable the peripherals and PLD to exchange data with the ARM-based embedded processor. The performance of the ARM-based family is not compromised by the addition of the interfaces to or from the embedded logic, and is equivalent to an ASIC implementation of an ARM922T on a 0.18–μm CMOS process. The ARMv4T instruction set is binary-compatible with many other ARM family members. ARM-based embedded processor devices are supported by Altera’s Quartus development system, a single, integrated package that offers HDL and schematic design entry, compilation and logic synthesis, full simulation and worst-case timing analysis, SignalTap logic analysis, and device configuration. The Quartus software runs on Windows-based PCs, Sun SPARCstations, and HP 9000 Series 700/800 workstations. The Quartus software provides NativeLink interfaces to other industry-standard PC- and UNIX workstation-based EDA tools. Further, the Quartus software contains built-in optimized synthesis libraries; synthesis tools can use these libraries to optimize designs for ARM-based embedded processor devices.

• Industry-standard ARM922T 32-bit RISC processor core operating at up to 166 MHz
• Advanced memory configuration support
• Harvard cache architecture with separate 8-Kbyte instruction and 8-Kbyte data caches
• Internal single-port SRAM up to 256 Kbytes
• Internal dual-port SRAM up to 128 Kbytes
• External SDRAM 133-MHz data rate (PC133) interface up to 512 Mbytes
• External dual data rate (DDR) 266-MHz data rate (PC266) interface up to 256 Mbytes
• External flash memory up to 32 Mbytes
• Expansion bus interface (EBI) is compatible with industry-standard flash memory, SRAMs, and peripheral devices
• Advanced bus architecture based on AMBA high performance bus (AHB)
• ETM9 embedded trace module to assist software debugging
• Flexible interrupt controller
• Universal asynchronous receiver/transmitter (UART)
• General-purpose timer
• Watchdog timer
• PLD configuration/reconfiguration possible via the embedded processor software
• Integrated hardware and software development environment
• Extended Quartus development environment for Excalibur support Altera MegaWizard Plug-In Manager interface configures the embedded processor, PLD, bus connections, and peripherals C/C++ compiler, source-level debugger, and RTOS support
• Advanced packaging options including SameFrame pin migration
• Fully configurable memory map
• SignalTap embedded logic analyzer
• Software debug monitor
• Real-time data/instruction processor trace
• Background debug monitoring via the IEEE Std. 1149.1 (JTAG) interface
• Multiple and separate clock domains controlled by softwareprogrammable phased-lock loops (PLLs) for embedded processor, SDRAM, and PLD
• PLL features include ClockLock feature reducing clock delay and skew ClockBoost feature providing clock multiplication ClockShift programmable clock phase and delay shifting