Zilog Z84C2006VEG

The Z80 PIO Parallel l/O Circuit (hereinafter referred to as the Z80 PIO or PIO) is a programmable, dual - port device that provides a TTL - compatible interface between peripheral devices and the Z80 CPU. The CPU Configures the Z80 PIO to interface with a wide range of peripheral devices that are compatible with the Z80 PIO include most keyboards, paper tape readers and punches, printers, and PROM programmers. One characteristic of the Z80 peripheral controllers that separates them from other interface controllers is that all data transfer between the peripheral device and the CPU is accomplished under interrupt control. Thus, the interrupt logic of the PIO permits full use of the efficient interrupt capabilities of the Z80 CPU during I/O transfers. All logic necessary to implement a fully nested interrupt structure is included in the PIO. Another feature of the PIO is the ability to interrupt the CPU upon occurrence of specified status conditions in the peripheral device. For example, the PIO can be programmed to interrupt if any specified peripheral alarm conditions should occur. This interrupt capability reduces the time the processor must spend in polling peripheral status. The Z80 PIO interfaces to peripherals via two independent general - purpose I/O ports, designated Port A and Port B. Each port has eight data bits and two handshake signals, Ready and Strobe, which control data transfer. The Ready output indicates to the peripheral that the port is ready for a data transfer. Strobe is an input from the peripheral that indicates when a data transfer has occurred. Operating Modes. The Z80 PIO ports can be programmed to operate in four modes: Output (Mode 0), Input (Mode 1), Bidirectional (Mode 2) and Bit Control (Mode 3). Data outputs are controlled by the CPU and can be written or changed at any time. Individual bits can be masked off. The handshake signals are not used in Mode 3; Ready is held Low, and Strobe is disabled. When using the Z80 PIO interrupts, the Z80 CPU interrupt mode must be set to Mode 2.

• Provides a direct interface between Z80 microcomputer systems and peripheral devices.
• Two ports with interrupt - driven handshake for fast response.
• Four programmable operating modes: Output, Input, Bidirectional (Port A only), and Bit Control.
• Programmable interrupts on peripheral status conditions.
• NMOS version for cost sensitive performance solution.
• CMOS version for the designs requiring high speed and low power consumption.
• Standard Z80 Family bus - request and prioritized interrupt - request daisy chains implemented without external logic.
• The eight Port B outputs can drive Darlington transistors.
• 6 MHz version supports 6.144 MHz CPU clock operation.