TI SN65C1154DW

The SN65C1164 and SN75C1154 are low-power BiMOS devices containing four independent drivers and receivers for interfacing data terminal equipment (DTE) with data circuit-terminating equipment (DCE). These devices are designed to meet the TIA/EIA-232-F standard. The drivers and receivers of the SN65C1154 and SN75C1154 are similar to the SN75C188 quad driver and SN75C189A quad receiver, respectively. The drivers feature a controlled output slew rate limited to a maximum of 30 V/µs, while the receivers incorporate filters that reject input noise pulses with durations shorter than 1 µs. These two features eliminate the need for external components.

The SN65C1154 and SN75C1154 are designed in a BiMOS process using low-power technology. In most applications, the receivers in these devices interface with a single input of a peripheral such as an ACE, UART, or microprocessor. Through sampling, such peripherals are typically insensitive to the transition time of received signals. If this is not the case, or for other purposes, it is recommended to buffer the SN65C1154 and SN75C1154 receiver outputs using a single Schmitt-input gate or single gate from the HCMOS, ALS, or 74F logic families.