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Rockchip RK3562RoHS

Manufacturer
RockchipAsian Brands
MPN
RK3562
LCSC Part #
C29779896
Packaging
FCCSP-478L(13.9x13.9)
Customer #
Key Attributes
FCCSP-478L(13.9x13.9) Microcontrollers RoHS
Datasheetpdf iconRockchip RK3562
In-Stock: 116
116 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 16.3449$ 16.34
10+$ 13.7132$ 137.13
30+$ 12.2943$ 368.83
119+$ 11.1042$ 1321.40
Standard Packaging119/Full Tray
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Embedded/Microcontrollers
ManufacturerRockchip
PackagingFCCSP-478L(13.9x13.9)

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging119
Sales UnitPiece

Introduction

AI Translation

RK3562 is a high-performance and low-power quad-core application processor designed for consumer electronics equipments. RK3562 features several embedded hardware engines to optimize performance for highend applications. It supports almost full-format H.264 decoding at 1080p@60fps, H.265 decoding at 4K@30fps, and H.264 encoding at 1080p@60fps. Additionally, it includes a high-quality JPEG encoder and decoder. RK3562 includes an embedded 3D GPU that ensures complete compatibility with OpenGL ES 1.1/2.0/3.2, OpenCL 2.0, and Vulkan 1.1. Additionally, a special 2D hardware engine is included to maximize display performance and ensure smooth operation. The built-in NPU supports hybrid operations with INT4/INT8/INT16/FP16 data types. Additionally, it boasts strong compatibility with a series of frameworks, such as TensorFlow, MXNet, PyTorch, and Caffe, enabling easy conversion of network models. RK3562 has a high-performance external memory interface(DDR3/DDR3L/DDR4 /LPDDR3/LPDDR4/LPDDR4X) capable of sustaining demanding memory bandwidths.

Features

AI Translation
  • Quad-core ARM Cortex-A53 MPCore processor, high-performance, low-power and cached application processor
  • Full implementation of the ARM architecture v8-A instruction set, ARM Neon Advanced SIMD (single instruction, multiple data) support for accelerated media and signal processing computation
  • ARMv8 Cryptography Extensions
  • In-order pipeline with symmetric dual-issue of most instructions.
  • Integrated 32KB L1 instruction cache, 32KB L1 data cache with 4-way set associative
  • Level 2 (L2) memory system providing cluster memory coherency, including an L2 cache.
  • Include VFP v3 hardware to support single and double-precision add, subtract, divide, multiply and accumulate, and square root operations
  • TrustZone technology support
  • Separate power domains for CPU core system to support internal power switch and external