Infineon/CYPRESS CY7C168A-25PC

The CY7C168A is a high-performance CMOS SRAM organized as 4096×4 bits. Memory expansion is easily achieved using the active-low chip enable (CE) and three-state drivers. The CY7C168A features automatic power-down, reducing power consumption by 77% when deselected. Data is written to the device when both chip select (CE) and write enable (WE) inputs are low. The memory location specified by the address pins (A0–A11) is written with data present on the four data I/O pins (I/O0–I/O3). The device is read when chip enable (CE) is low and write enable (WE) remains high. Under these conditions, the contents of the location specified by the address pins appear on the four data I/O pins I/O0–I/O3. When chip enable (CE) is high or write enable (WE) is low, the I/O pins are held in a high-impedance state. A die coat is applied to ensure alpha particle immunity.

• Automatic power-down when deselected
• CMOS technology for optimized speed-power ratio
• High-speed access time: 15ns
• Low active power dissipation: 633mW
• Low standby power dissipation: 110mW
• I/O compatible with TTL levels
• Input high voltage: 2.2V
• ESD protection voltage: >2001V