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Infineon/CYPRESS S25FS128SAGNFI101 product image
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Infineon/CYPRESS S25FS128SAGNFI101RoHS

Manufacturer
Infineon/CYPRESS
MPN
S25FS128SAGNFI101
LCSC Part #
C2954241
Packaging
WDFN-8-EP
Customer #
Key Attributes
FS-S Flash SPI Multi-1/O
Datasheetpdf iconInfineon/CYPRESS S25FS128SAGNFI101
In-Stock: 89
89 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 5.768$ 5.77
10+$ 4.9364$ 49.36
30+$ 4.4416$ 133.25
100+$ 3.9419$ 394.19
500+$ 3.7125$ 1856.25
1,485+$ 3.6083$ 5358.33
Standard Packaging1485/Full Tube
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Memory/Memory (ICs)
ManufacturerInfineon/CYPRESS
PackagingWDFN-8-EP
Voltage - Supply1.7V~2V
Memory Size128Mbit
Operating temperature-40℃~+85℃
Program / Erase Cycles100,000 cycles
Clock Frequency133MHz
FeaturesWrite enable latch;Power-on reset;Hardware write protection;Software write protection;Absolute write protection;ECC error correction
Data Retention - TDR (Year)20 Years
Standby Supply Current0.025mA
InterfaceSPI
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging1485
Sales UnitPiece

Features

AI Translation
  • Density - S25FS128S - 128 Mbits (16 MB) - S25FS256S - 256 Mbits (32 MB)
  • Serial peripheral interface (SPI)
    • SPI clock polarity and phase modes 0 and 3
    • Double data rate (DDR) option
    • Extended addressing: 24- or 32-bit address options
    • Serial command subset and footprint compatible with S25FL-A, S25FL-K, S25FL-P, and S25FL-S SPI families
    • Multi I/O command subset and footprint compatible with S25FL-P, and S25FL-S SPI families
  • Read
    • Commands: Normal, Fast, Dual I/O, Quad I/O, DDR Quad I/O
    • Modes: Burst Wrap, Continuous (XIP), QPI
    • Serial flash discoverable parameters (SFDP) and common flash interface (CFI), for configuration information
  • Program
    • 256- or 512-byte page programming buffer
    • Program suspend and resume
    • Automatic ECC – internal hardware error correction code generation with single-bit error correction
  • Erase
    • Hybrid sector options
      • Physical set of eight 4-KB sectors and one 32-KB sector at the top or bottom of address space with all remaining sectors of 64 KB
      • Physical set of eight 4-KB sectors and one 224-KB sector at the top or bottom of address space with all remaining sectors of 256 KB
    • Uniform sector options
      • Uniform 64-KB or 256-KB blocks for software compatibility with higher density and future devices
    • Erase suspend and resume
    • Erase status evaluation
    • 100,000 program-erase cycles, minimum
    • 20 year data retention, minimum
  • Security features
    • One-time program (OTP) array of 1024 bytes
    • Block protection:
      • Status Register bits to control protection against program or erase of a contiguous range of sectors
      • Hardware and software control options
    • Advanced sector protection (ASP)
      • Individual sector protection controlled by boot code or password
      • Option for password control of read access
  • Technology - 65-nm MIRRORBIT technology with Eclipse architecture
  • Supply voltage - 1.7 V to 2.0 V
  • Temperature range / grade
    • Industrial -40℃ to +85℃
    • Industrial Plus -40℃ to +105℃
    • Automotive AEC-Q100 grade 3 -40℃ to +85℃
    • Automotive AEC-Q100 grade 2 -40℃ to +105℃
    • Automotive AEC-Q100 grade 1 -40℃ to +125℃
  • Packages (All Pb-free)
    • 8-lead SOIC 208 mil (SOC008) — FS128S only
    • WSON 6x5 mm (WND008) - FS128S only
    • WSON 6x8 mm (WNH008)
    • 16-lead SOIC 300 mil (SO3016) — FS256S only
    • BGA-24 6x8 mm
      • 5x5 ball (FAB024) footprint
      • 4x6 ball (FAC024) footprint
    • Known good die, and known tested die