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TI SN74AHC74QDRQ1RoHS

Manufacturer
MPN
SN74AHC74QDRQ1
LCSC Part #
C2878707
Packaging
SOIC-14
Customer #
Key Attributes
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
Datasheetpdf iconTI SN74AHC74QDRQ1
In-Stock: 90
90 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
1+$ 0.5281$ 0.53
10+$ 0.4196$ 4.20
30+$ 0.3734$ 11.20
100+$ 0.3143$ 31.43
500+$ 0.2888$ 144.40
1,000+$ 0.2729$ 272.90
Standard Packaging2500/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Flip Flops
ManufacturerTI
PackagingSOIC-14
Operating Temperature-40℃~+125℃
Voltage - Supply2V~5.5V
Number of Bits per Element1
Series74AHC Series
Output TypeComplementary type
Number of Elements2
Current - Output High(IOH)8mA
Current - Output Low(IOL)8mA
Setup Time5ns
Quiescent Current2uA
Hold Time500ps
Propagation Delay9.3ns@5V,50pF
Trigger TypeRising Edge

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

The SN74AHC74Q dual positive-edge-triggered device is a D-type flip-flop. A low level at the preset (PRE(overline)) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

Features

AI Translation
  • Qualified for Automotive Applications
  • EPIC (Enhanced-Performance Implanted CMOS) Process
  • Operating Range 2-V to 5.5-Vcc
  • Latch-Up Performance Exceeds ±50 mA Per JESD 17
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model ΔC = 200 pF, R = 0