- Pinout Diagram
- Footprint Diagram
TI LMK5C33216RGCT
| Manufacturer | |
| MPN | LMK5C33216RGCT |
| LCSC Part # | C2873616 |
| Packaging | VQFN-64(9x9) |
| Customer # | |
| Key Attributes | 3GHz 3.135V~3.465V 1 VQFN-64(9x9) Clock Generators, PLLs, Frequency Synthesizers RoHS |
| Datasheet |  TI LMK5C33216RGCT |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | TI | |
| Packaging | VQFN-64(9x9) | |
| Operating Temperature | -40℃~+85℃ | |
| Output Frequency(Max) | 3GHz | |
| Voltage - Supply | 3.135V~3.465V | |
| Features | Automatic clock switching;Programmable phase and delay control;Output synchronization;On-chip non-volatile parameter storage;Cascading function;External oscillator interface | |
| Output Level | CML;LVPECL;LVCMOS;LVDS | |
| Number of Outputs | 1 |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 250 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
LMK5C33216 is a high-performance network clock generator, synchronizer, and jitter attenuator with advanced reference clock selection and hitless switching capabilities, meeting the stringent requirements of communications infrastructure applications. The LMK5C33216 integrates 3 DPLLs with programmable loop bandwidth and no external loop filter, maximizing flexibility and ease of use. Each DPLL phase locks its paired APLL to the DPLL reference input. The APLL reference determines long-term frequency accuracy. The 3 APLLs can operate independently of their paired DPLLs and can be cascaded from another APLL to provide programmable frequency translation. APLL3 employs an ultra-high-performance PLL using TI's proprietary bulk acoustic wave (BAW) VCBO technology, generating output clocks with 40fs RMS jitter regardless of the jitter and frequency of the XO and reference inputs. APLL1 and APLL2 provide options for other frequency domains. The device supports full programmability via I2C or SPI interface. An on-board EEPROM is available for customizing system startup clocks.
Features
- BAW APLL with 40fs RMS jitter at 491.52MHz
- Three high-performance DPLLs with paired APLLs
- Programmable DPLL loop bandwidth: 0.01Hz to 4kHz
- –116 dBc/Hz at 100Hz offset frequency under 122.88MHz DPLL TDC noise when TDC rate ≥ 20MHz
- Two differential or single-ended DPLL inputs
- 1Hz to 800MHz differential
- Hitless switching with phase suppression and/or phase slew control
- Priority-based reference selection
- 16 outputs with programmable formats
- 1000MHz LVPECL/LVDS/HSDS
- 3000MHz CML on OUT4 and OUT6
- 200MHz LVCMOS on OUT0 and OUT1
- 3.3V single supply with internal LDO
- I2C or 3-wire/4-wire SPI interface
- Requires single XO/TCXO/OCXO
- 40-bit DPLL or APLL DCO, < 1ppt
- Holdover with phase build-out on exit
- Zero-delay mode with programmable delay
- User-programmable EEPROM
- Supports 105°C PCB temperature
Applications
- 4G and 5G wireless networks
- Baseband Unit (BBU)
- Active Antenna Unit (AAU)
- Remote Radio Unit (RRU)
- Network Switch (5G HUB)
- Small Cell
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 54.4691 | $ 54.47 |
| 30+ | $ 51.5527 | $ 1546.58 |
Standard Packaging250/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | TI | |
| Packaging | VQFN-64(9x9) | |
| Operating Temperature | -40℃~+85℃ | |
| Output Frequency(Max) | 3GHz | |
| Voltage - Supply | 3.135V~3.465V | |
| Features | Automatic clock switching;Programmable phase and delay control;Output synchronization;On-chip non-volatile parameter storage;Cascading function;External oscillator interface | |
| Output Level | CML;LVPECL;LVCMOS;LVDS | |
| Number of Outputs | 1 |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 250 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
LMK5C33216 is a high-performance network clock generator, synchronizer, and jitter attenuator with advanced reference clock selection and hitless switching capabilities, meeting the stringent requirements of communications infrastructure applications. The LMK5C33216 integrates 3 DPLLs with programmable loop bandwidth and no external loop filter, maximizing flexibility and ease of use. Each DPLL phase locks its paired APLL to the DPLL reference input. The APLL reference determines long-term frequency accuracy. The 3 APLLs can operate independently of their paired DPLLs and can be cascaded from another APLL to provide programmable frequency translation. APLL3 employs an ultra-high-performance PLL using TI's proprietary bulk acoustic wave (BAW) VCBO technology, generating output clocks with 40fs RMS jitter regardless of the jitter and frequency of the XO and reference inputs. APLL1 and APLL2 provide options for other frequency domains. The device supports full programmability via I2C or SPI interface. An on-board EEPROM is available for customizing system startup clocks.
Features
- BAW APLL with 40fs RMS jitter at 491.52MHz
- Three high-performance DPLLs with paired APLLs
- Programmable DPLL loop bandwidth: 0.01Hz to 4kHz
- –116 dBc/Hz at 100Hz offset frequency under 122.88MHz DPLL TDC noise when TDC rate ≥ 20MHz
- Two differential or single-ended DPLL inputs
- 1Hz to 800MHz differential
- Hitless switching with phase suppression and/or phase slew control
- Priority-based reference selection
- 16 outputs with programmable formats
- 1000MHz LVPECL/LVDS/HSDS
- 3000MHz CML on OUT4 and OUT6
- 200MHz LVCMOS on OUT0 and OUT1
- 3.3V single supply with internal LDO
- I2C or 3-wire/4-wire SPI interface
- Requires single XO/TCXO/OCXO
- 40-bit DPLL or APLL DCO, < 1ppt
- Holdover with phase build-out on exit
- Zero-delay mode with programmable delay
- User-programmable EEPROM
- Supports 105°C PCB temperature
Applications
- 4G and 5G wireless networks
- Baseband Unit (BBU)
- Active Antenna Unit (AAU)
- Remote Radio Unit (RRU)
- Network Switch (5G HUB)
- Small Cell
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |